diff options
author | Peter Lemenkov <lemenkov@gmail.com> | 2020-02-04 14:45:33 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-04 16:02:09 +0000 |
commit | c46dd3954153414b1e211456cf18b8b181b0f80c (patch) | |
tree | 81defc5596ab733d28a61ed3d563f5443629606f /src/mainboard/lenovo/t530 | |
parent | 257cc4f9c3168472f5db13154fae2ee50c4160f9 (diff) |
mb/lenovo/[tw]530/devicetree: Fix comment about chip codename
Change-Id: I3323e713970041b0665ca17bbcad985cba600687
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/lenovo/t530')
-rw-r--r-- | src/mainboard/lenovo/t530/variants/t530/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/lenovo/t530/variants/w530/devicetree.cb | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb index 674b0f8c02..c5eb02fe62 100644 --- a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb @@ -43,7 +43,7 @@ chip northbridge/intel/sandybridge device pci 01.0 on end # PCIe bridge for discrete graphics device pci 02.0 on end # Internal graphics VGA controller - chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + chip southbridge/intel/bd82x6x # Intel Series 6 Panther Point PCH # GPI routing # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) diff --git a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb index da5a094b11..c2e32e3a05 100644 --- a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb +++ b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb @@ -48,7 +48,7 @@ chip northbridge/intel/sandybridge subsystemid 0x17aa 0x21f5 end - chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH + chip southbridge/intel/bd82x6x # Intel Series 6 Panther Point PCH # GPI routing # 0 No effect (default) # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |