aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/lenovo/t410/romstage.c
diff options
context:
space:
mode:
authorNicolas Reinecke <nr@das-labor.org>2015-07-04 23:37:06 +0200
committerArthur Heymans <arthur@aheymans.xyz>2019-10-15 06:47:48 +0000
commitb165c4a46f003b396a2bbad9f9077f5d498ecbbf (patch)
tree1299ec9f5145a9db7f75a149a3147c9f1e4a737a /src/mainboard/lenovo/t410/romstage.c
parent465dd5c5241c5f682fb987c1c2ea0b47a28009fb (diff)
mainboard/lenovo/t410: Add new port
The port is based on the x201 / t410s. 2537-vg5 / i5, no discrete gpu Tested and working: * Native raminit * Native gfxinit * Booting Seabios 1.12.1 * Booting from EHCI * Running GNU/Linux 5.0.0 * No errors in dmesg * EHCI debug on the devices left side, bottom-right * Keyboard * Fn keys (Mute, Volume, Mic) * Touchpad * TPM * Wifi * Sound * USB * Ethernet * S3 resume * VBOOT Testing in progress. Untested: * VGA * Displayport * Docking station Bugs: * AC adapter can't be read from ACPI * TPM not working with VBOOT and C_ENV BB Details for flashing externally: 1. Disconnect all power 2. Connect the external flasher 3. Connect the power cord (This fixes internal power control) 4. Remove the power cord Change-Id: Id9d872e643dd242e925bfb46d18076e6ad100995 Signed-off-by: Nicolas Reinecke <nr@das-labor.org> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/11791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/lenovo/t410/romstage.c')
-rw-r--r--src/mainboard/lenovo/t410/romstage.c75
1 files changed, 75 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t410/romstage.c b/src/mainboard/lenovo/t410/romstage.c
new file mode 100644
index 0000000000..7c796de8ee
--- /dev/null
+++ b/src/mainboard/lenovo/t410/romstage.c
@@ -0,0 +1,75 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
+ * Copyright (C) 2013 Vladimir Serbinenko <phcoder@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stdint.h>
+#include <device/pci_ops.h>
+#include <southbridge/intel/ibexpeak/pch.h>
+#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
+#include <northbridge/intel/nehalem/nehalem.h>
+
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+ /* Enabled, Current table lookup index, OC map */
+ { 1, IF1_557, 0 },
+ { 1, IF1_55F, 1 },
+ { 1, IF1_74B, 3 },
+ { 1, IF1_14B, 3 },
+ { 1, IF1_14B, 3 },
+ { 1, IF1_74B, 3 },
+ { 1, IF1_74B, 3 },
+ { 1, IF1_74B, 3 },
+ { 1, IF1_55F, 4 },
+ { 1, IF1_55F, 5 },
+ { 1, IF1_74B, 7 },
+ { 1, IF1_74B, 7 },
+ { 1, IF1_557, 7 },
+ { 1, IF1_55F, 7 },
+};
+
+static void hybrid_graphics_init(void)
+{
+ bool peg, igd;
+ u32 reg32;
+
+ early_hybrid_graphics(&igd, &peg);
+
+ /* Hide disabled devices */
+ reg32 = pci_read_config32(PCI_DEV(0, 0, 0), D0F0_DEVEN);
+ reg32 &= ~(DEVEN_PEG10 | DEVEN_IGD);
+
+ if (peg)
+ reg32 |= DEVEN_PEG10;
+
+ if (igd)
+ reg32 |= DEVEN_IGD;
+ else
+ /* Disable IGD VGA decode, no GTT or GFX stolen */
+ pci_write_config16(PCI_DEV(0, 0, 0), D0F0_GGC, 2);
+
+ pci_write_config32(PCI_DEV(0, 0, 0), D0F0_DEVEN, reg32);
+}
+
+void mainboard_pre_raminit(void)
+{
+ hybrid_graphics_init();
+}
+
+void mainboard_get_spd_map(u8 *spd_addrmap)
+{
+ spd_addrmap[0] = 0x50;
+ spd_addrmap[2] = 0x52;
+}