diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 11:53:23 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-05 14:23:37 +0000 |
commit | f9679c42876bab145f1b7a2a2e6e1eb5331fa418 (patch) | |
tree | da25caeb40c92bc3b3150eb7201cd29ef5f48f61 /src/mainboard/lenovo/t400 | |
parent | 31ba9356b877d670e683953f8b8962a7e6206cc3 (diff) |
nb/intel/gm45: Remove apic 0 from devicetree
This is added at runtime.
Change-Id: Ife2865f91e3d046bc66e423b2054f56176f57fc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69300
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/t400')
-rw-r--r-- | src/mainboard/lenovo/t400/devicetree.cb | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb index 7946e34bb2..1df350ab67 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -10,12 +10,7 @@ chip northbridge/intel/gm45 register "slfm" = "1" - device cpu_cluster 0 on - ops gm45_cpu_bus_ops - chip cpu/intel/socket_p - device lapic 0 on end - end - end + device cpu_cluster 0 on ops gm45_cpu_bus_ops end register "pci_mmio_size" = "2048" |