diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2018-09-16 18:55:28 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-21 09:25:41 +0000 |
commit | 03180212b7295d288bd79c5756d9355c55bd2193 (patch) | |
tree | 1b44688f380b101a6b17012e4e9f3f01694272d4 /src/mainboard/lenovo/t400/gpio.c | |
parent | 86fa2792b98cabd0b8604342a44e099d8ade5a77 (diff) |
mb/lenovo/r500: Add mainboard
Tested:
- Ethernet NIC
- Wifi RFKill
- USB
- LVDS, VGA with libgfxinit
- Booting with dock attached (COM1)
- Keyboard, trackpoint
- SeaBIOS 1.12
- S3 resume
- Tested in descriptor mode, with vendor FD and ME
- Add VBT to ACPI OPregion
Untested:
- SATA (likely works)
- Trackpad (my cable is broken, likely works)
- Displayport (likely works)
- Descriptorless mode
- DVD drive
- Extra battery
- model with ATI GPU
Does not work:
- Dock hotplug
- Quad core CPU (hangs during AP init, probably needs hardware mod)
- Hotplugging the expresscard slot (works with 'echo 1 | sudo tee
/sys/bus/pci/rescan')
TODO:
- proper dock support
- documentation
note: This board was hard to flash, I had to desolder the flash.
TESTED: on a R500 with an Intel iGPU, SeaBIOS 1.12, Debian 9,
Linux 4.9 from USB
Change-Id: I9e129b2e916acdf2b8534fa9d8d2cfc8f64f5815
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/28644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/lenovo/t400/gpio.c')
-rw-r--r-- | src/mainboard/lenovo/t400/gpio.c | 128 |
1 files changed, 0 insertions, 128 deletions
diff --git a/src/mainboard/lenovo/t400/gpio.c b/src/mainboard/lenovo/t400/gpio.c deleted file mode 100644 index ef340f28bf..0000000000 --- a/src/mainboard/lenovo/t400/gpio.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <southbridge/intel/common/gpio.h> - -static const struct pch_gpio_set1 pch_gpio_set1_mode = { - .gpio1 = GPIO_MODE_GPIO, - .gpio2 = GPIO_MODE_GPIO, - .gpio3 = GPIO_MODE_GPIO, - .gpio4 = GPIO_MODE_GPIO, - .gpio5 = GPIO_MODE_GPIO, - .gpio6 = GPIO_MODE_GPIO, - .gpio7 = GPIO_MODE_GPIO, - .gpio8 = GPIO_MODE_GPIO, - .gpio9 = GPIO_MODE_GPIO, - .gpio13 = GPIO_MODE_GPIO, - .gpio17 = GPIO_MODE_GPIO, - .gpio18 = GPIO_MODE_GPIO, - .gpio19 = GPIO_MODE_GPIO, - .gpio20 = GPIO_MODE_GPIO, - .gpio21 = GPIO_MODE_GPIO, - .gpio22 = GPIO_MODE_GPIO, - .gpio24 = GPIO_MODE_GPIO, - .gpio27 = GPIO_MODE_GPIO, - .gpio28 = GPIO_MODE_GPIO, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_direction = { - .gpio1 = GPIO_DIR_INPUT, - .gpio2 = GPIO_DIR_INPUT, - .gpio3 = GPIO_DIR_INPUT, - .gpio4 = GPIO_DIR_INPUT, - .gpio5 = GPIO_DIR_INPUT, - .gpio6 = GPIO_DIR_INPUT, - .gpio7 = GPIO_DIR_INPUT, - .gpio8 = GPIO_DIR_INPUT, - .gpio9 = GPIO_DIR_OUTPUT, - .gpio13 = GPIO_DIR_INPUT, - .gpio17 = GPIO_DIR_INPUT, - .gpio18 = GPIO_DIR_INPUT, - .gpio19 = GPIO_DIR_OUTPUT, - .gpio20 = GPIO_DIR_OUTPUT, - .gpio21 = GPIO_DIR_INPUT, - .gpio22 = GPIO_DIR_OUTPUT, - .gpio24 = GPIO_DIR_INPUT, - .gpio27 = GPIO_DIR_OUTPUT, - .gpio28 = GPIO_DIR_OUTPUT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_level = { - .gpio9 = GPIO_LEVEL_HIGH, - .gpio19 = GPIO_LEVEL_HIGH, - .gpio20 = GPIO_LEVEL_HIGH, - .gpio22 = GPIO_LEVEL_HIGH, - .gpio27 = GPIO_LEVEL_LOW, - .gpio28 = GPIO_LEVEL_LOW, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_invert = { - .gpio1 = GPIO_INVERT, - .gpio8 = GPIO_INVERT, -}; - -static const struct pch_gpio_set1 pch_gpio_set1_blink = { -}; - -static const struct pch_gpio_set2 pch_gpio_set2_mode = { - .gpio33 = GPIO_MODE_GPIO, - .gpio34 = GPIO_MODE_GPIO, - .gpio36 = GPIO_MODE_GPIO, - .gpio37 = GPIO_MODE_GPIO, - .gpio38 = GPIO_MODE_GPIO, - .gpio39 = GPIO_MODE_GPIO, - .gpio41 = GPIO_MODE_GPIO, - .gpio42 = GPIO_MODE_GPIO, - .gpio48 = GPIO_MODE_GPIO, - .gpio49 = GPIO_MODE_GPIO, - .gpio56 = GPIO_MODE_GPIO, - .gpio57 = GPIO_MODE_GPIO, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_direction = { - .gpio33 = GPIO_DIR_OUTPUT, - .gpio34 = GPIO_DIR_OUTPUT, - .gpio36 = GPIO_DIR_INPUT, - .gpio37 = GPIO_DIR_INPUT, - .gpio38 = GPIO_DIR_INPUT, - .gpio39 = GPIO_DIR_INPUT, - .gpio41 = GPIO_DIR_OUTPUT, - .gpio42 = GPIO_DIR_OUTPUT, - .gpio48 = GPIO_DIR_INPUT, - .gpio49 = GPIO_DIR_OUTPUT, - .gpio56 = GPIO_DIR_INPUT, - .gpio57 = GPIO_DIR_INPUT, -}; - -static const struct pch_gpio_set2 pch_gpio_set2_level = { - .gpio33 = GPIO_LEVEL_HIGH, - .gpio34 = GPIO_LEVEL_LOW, - .gpio41 = GPIO_LEVEL_HIGH, - .gpio42 = GPIO_LEVEL_HIGH, - .gpio49 = GPIO_LEVEL_HIGH, -}; - -const struct pch_gpio_map mainboard_gpio_map = { - .set1 = { - .mode = &pch_gpio_set1_mode, - .direction = &pch_gpio_set1_direction, - .level = &pch_gpio_set1_level, - .blink = &pch_gpio_set1_blink, - .invert = &pch_gpio_set1_invert, - }, - .set2 = { - .mode = &pch_gpio_set2_mode, - .direction = &pch_gpio_set2_direction, - .level = &pch_gpio_set2_level, - }, -}; |