diff options
| author | Keith Hui <buurin@gmail.com> | 2023-07-22 12:49:05 -0400 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-11-13 20:31:23 +0000 |
| commit | 45e4ab4a660cb7ce312f2d11a153f2d9ef4158da (patch) | |
| tree | 8b0fb3b07ecb3cfa84aa77b51c0e1053a1415c73 /src/mainboard/lenovo/s230u | |
| parent | 940fe080bf1ed2dac827b569c70fb0ea11496041 (diff) | |
mb/*: Update SPD mapping for sandybridge boards
Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree.
Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping.
Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/s230u')
| -rw-r--r-- | src/mainboard/lenovo/s230u/early_init.c | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/src/mainboard/lenovo/s230u/early_init.c b/src/mainboard/lenovo/s230u/early_init.c index 434b58c6a3..58e95932b8 100644 --- a/src/mainboard/lenovo/s230u/early_init.c +++ b/src/mainboard/lenovo/s230u/early_init.c @@ -1,17 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> -#include <string.h> -#include <cbfs.h> #include <device/pci_ops.h> #include <console/console.h> -#include <northbridge/intel/sandybridge/raminit_native.h> +#include <northbridge/intel/sandybridge/raminit.h> #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/common/gpio.h> #include "ec.h" -#define SPD_LEN 256 - void mainboard_pch_lpc_setup(void) { /* Memory map KB9012 EC registers */ @@ -54,26 +49,27 @@ static const char *mainboard_spd_names[9] = { "HYNIX 2GB", }; -void mainboard_get_spd(spd_raw_data *spd, bool id_only) +static unsigned int get_spd_index(void) { - void *spd_file; - size_t spd_file_len = 0; const int spd_gpios[] = {71, 70, 16, 48, -1}; - u32 spd_index = get_gpios(spd_gpios); + unsigned int spd_index = get_gpios(spd_gpios); if (spd_index >= ARRAY_SIZE(mainboard_spd_names)) { /* Fallback to pessimistic 2GB image (ELPIDA 2GB) */ spd_index = 6; } + return spd_index; +} + +void mb_get_spd_map(struct spd_info *spdi) +{ + unsigned int spd_index = get_spd_index(); + printk(BIOS_INFO, "SPD index %d (%s)\n", spd_index, mainboard_spd_names[spd_index]); /* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */ - spd_file = cbfs_map("spd.bin", &spd_file_len); - - if (!spd_file || spd_file_len < SPD_LEN * spd_index + SPD_LEN) - die("SPD data not found."); - - memcpy(spd, spd_file + SPD_LEN * spd_index, SPD_LEN); + spdi->addresses[0] = SPD_MEMORY_DOWN; + spdi->spd_index = spd_index; } |