mainboard/lenovo: Add new port L520

Add support for Lenovo Thinkpad L520.

The files are generated by autoport,
and are successfully tested on the board.

L520 has got 4MiB flash chip, that contains a "slim" ME
with 1.2MiB only. The flash IC has to be desoldered, as
it won't be accessible in circuit. It is located on top
of the mainboard right under the touchpad.

Test-setup:
Extract the following blobs from vendor BIOS:
* Intel Flash Descriptor
* Intel Management Engine
* Intel VBios

The laptop has been externaly flashed. It was able to
turn on the display and load SeaBIOS.
Latest debian has been booted from harddisk.
Latest fedora has been booted from USB flash drive.

The following hardware has been tested and is working:
* Display using Option Rom
* PCIe wifi
* Ethernet
* Keyboard, trackpoint and touchpad
* Some Fn functions keys
* Volume Keys (except mic mute)
* Status LEDs
* Audio (headphone jack only)
* USB ports
* Native raminit dual channel (2 DDR3-1333 DIMMs tested)
* SATA cdrom
* SATA harddrive

Broken:
* Some Fn functions keys
* Microphone mute button
* Speakers (but headphone jack gives sound)

Untested:
* Expansion slot
* SD card slot
* Docking station
* Native gfx init

The EHCI debug port is the first one on the right side.

Change-Id: Ic8943799b953bde09ff1daf8427ce5125a0778ca
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/18003
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 102 insertions, 0 deletions

diff --git a/src/mainboard/lenovo/l520/smihandler.c b/src/mainboard/lenovo/l520/smihandler.c
new file mode 100644
index 0000000000..1e463baf40
--- /dev/null
+++ b/src/mainboard/lenovo/l520/smihandler.c
@@ -0,0 +1,102 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008-2009 coresystems GmbH
+ * Copyright (C) 2016 Patrick Rudolph <siro@das-labor.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <ec/acpi/ec.h>
+#include <ec/lenovo/h8/h8.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+
+#define GPE_EC_SCI	6
+/* FIXME: check this */
+#define GPE_EC_WAKE	13
+
+static void mainboard_smm_init(void)
+{
+	printk(BIOS_DEBUG, "initializing SMI\n");
+	/* Enable 0x1600/0x1600 register pair */
+	ec_set_bit(0x00, 0x05);
+}
+
+int mainboard_io_trap_handler(int smif)
+{
+	static int smm_initialized;
+
+	if (!smm_initialized) {
+		mainboard_smm_init();
+		smm_initialized = 1;
+	}
+
+	return 0;
+}
+
+static void mainboard_smi_handle_ec_sci(void)
+{
+	u8 status = inb(EC_SC);
+	u8 event;
+
+	if (!(status & EC_SCI_EVT))
+		return;
+
+	event = ec_query();
+	printk(BIOS_DEBUG, "EC event %02x\n", event);
+}
+
+void mainboard_smi_gpi(u32 gpi_sts)
+{
+	if (gpi_sts & (1 << GPE_EC_SCI))
+		mainboard_smi_handle_ec_sci();
+}
+
+int mainboard_smi_apmc(u8 data)
+{
+	switch (data) {
+	case APM_CNT_ACPI_ENABLE:
+		/* use 0x1600/0x1604 to prevent races with userspace */
+		ec_set_ports(0x1604, 0x1600);
+		/* route EC_SCI to SCI */
+		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
+		/* discard all events, and enable attention */
+		ec_write(0x80, 0x01);
+		break;
+	case APM_CNT_ACPI_DISABLE:
+		/* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
+		   provide a EC query function */
+		ec_set_ports(0x66, 0x62);
+		/* route EC_SCI to SMI */
+		gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
+		/* discard all events, and enable attention */
+		ec_write(0x80, 0x01);
+		break;
+	default:
+		break;
+	}
+	return 0;
+}
+
+void mainboard_smi_sleep(u8 slp_typ)
+{
+	if (slp_typ == 3) {
+		u8 ec_wake = ec_read(0x32);
+		/* If EC wake events are enabled, enable wake on EC WAKE GPE.  */
+		if (ec_wake & 0x14) {
+			/* Redirect EC WAKE GPE to SCI.  */
+			gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
+		}
+	}
+}