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authorArthur Heymans <arthur@aheymans.xyz>2021-11-15 20:11:12 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-11-25 15:03:39 +0000
commitdd96ab698757c6b6f05612d92f38088e8f7069e5 (patch)
tree5baa8f55301af11b68a361a55aa6296675ab4806 /src/mainboard/lenovo/haswell
parentc87814d750073ba89c2a88d8dcc6c7611952ddbc (diff)
cpu/intel/haswell: Move chip_ops to cpu cluster
The cpu cluster is always present and it's the proper device to contain the settings that need to be applied to all cpus. This makes it possible to remove the fake lapic from devicetrees. Change-Id: Ic449b2df8036e8c02b5559cca6b2e7479a70a786 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59314 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/haswell')
-rw-r--r--src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb8
-rw-r--r--src/mainboard/lenovo/haswell/variants/w541/devicetree.cb8
2 files changed, 4 insertions, 12 deletions
diff --git a/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb b/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb
index 85c484be55..fc00734b5e 100644
--- a/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb
+++ b/src/mainboard/lenovo/haswell/variants/t440p/devicetree.cb
@@ -13,12 +13,8 @@ chip northbridge/intel/haswell
.backlight_pwm_hz = 220,
}"
register "ec_present" = "true"
- device cpu_cluster 0 on
- ops haswell_cpu_bus_ops
- chip cpu/intel/haswell
- device lapic 0 on end
- device lapic 0xacac off end
- end
+ chip cpu/intel/haswell
+ device cpu_cluster 0 on ops haswell_cpu_bus_ops end
end
device domain 0 on
ops haswell_pci_domain_ops
diff --git a/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb b/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb
index ef4668c7a4..292a30df60 100644
--- a/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb
+++ b/src/mainboard/lenovo/haswell/variants/w541/devicetree.cb
@@ -13,12 +13,8 @@ chip northbridge/intel/haswell
.backlight_pwm_hz = 220,
}"
register "ec_present" = "true"
- device cpu_cluster 0 on
- ops haswell_cpu_bus_ops
- chip cpu/intel/haswell
- device lapic 0 on end
- device lapic 0xacac off end
- end
+ chip cpu/intel/haswell
+ device cpu_cluster 0 on ops haswell_cpu_bus_ops end
end
device domain 0 on
ops haswell_pci_domain_ops