mb/intel/adlrvp: Add support for external clock buffer

ADL-P silicon can support 7 SRC CLK's and 10 CLKREQ signals. Out of 7
SRCCLK's 3 will be used for CPU, the rest are for PCH. If more than 4
PCH devices are connected on the platform, an external differential
buffer chip needs to be placed at the platform level.

A mainboard designer can choose to add an external clock chip, and
select the SRC CLK using CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER.

CONFIG_CLKSRC_FOR_EXTERNAL_BUFFER provides the CLKSRC that feed clock to
discrete buffer for further distribution to platform.

TEST=Able to detect SD card connected at x4 PCIe Gen 3 Slot.

localhost ~ # dmesg | grep mmc
[    4.997840] mmc0: SDHCI controller on PCI [0000:ae:00.0] using ADMA
[    5.460902] mmc0: new ultra high speed DDR50 SDHC card at address aaaa
[    5.473555] mmcblk0: mmc0:aaaa SS08G 7.40 GiB
[    5.494268]  mmcblk0: p1

Change-Id: I21f1155374049c90aa45db25d4128b39aa5898bb
Signed-off-by: Subrata Banik <subi.banik@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59976
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

0 files changed, 0 insertions, 0 deletions