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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-04-27 09:04:11 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-05-10 13:47:08 +0200 |
| commit | 53052fe5eefe8396b334e8bc8c1014fca4062a8f (patch) | |
| tree | c1d3e8f847d381f0ba11a3902022d88543bd81bb /src/mainboard/lenovo/g505s/buildOpts.c | |
| parent | a5d72a3170a4757375ee8f5e501da2a08dd7c5ae (diff) | |
AGESA boards: Relocate platform memory config
File buildOpts.c is a can of worms, pull platform memory
configuration in to OemCustomize.c. This array should be
assigned at runtime instead of linking a modified defaults
table.
Change-Id: I73d9d3fbc165e6c10472e105576d7c40820eaa6a
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14528
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/g505s/buildOpts.c')
| -rw-r--r-- | src/mainboard/lenovo/g505s/buildOpts.c | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c index 7b491d41fc..d633d07897 100644 --- a/src/mainboard/lenovo/g505s/buildOpts.c +++ b/src/mainboard/lenovo/g505s/buildOpts.c @@ -402,26 +402,3 @@ SCI_MAP_CONTROL lenovo_g505s_sci_map[] = { /* AGESA nonsense: this header depends on the definitions above */ #include <vendorcode/amd/agesa/f15tn/Include/PlatformInstall.h> -/*---------------------------------------------------------------------------------------- - * CUSTOMER OVERIDES MEMORY TABLE - *---------------------------------------------------------------------------------------- - */ - -/* - * Platform Specific Overriding Table allows IBV/OEM to pass in platform - * information to AGESA - * (e.g. MemClk routing, the number of DIMM slots per channel,...). - * If PlatformSpecificTable is populated, AGESA will base its settings on the - * data from the table. Otherwise, it will use its default conservative settings - */ -CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = { - - NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1), - NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2), - MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - CKE_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), - ODT_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), - CS_TRI_MAP (ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - - PSO_END -}; |