diff options
author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-23 17:38:52 +1100 |
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committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-11-27 11:28:24 +0100 |
commit | 32960e30f08f678355b20b5702e8028351a7275e (patch) | |
tree | 8a44ac8674c02286bccb63bf8286645b3c3c367b /src/mainboard/lenovo/g505s/agesawrapper.h | |
parent | b06eaf76b5142977aa130c22f09a97ad08bef036 (diff) |
mainboard/lenovo/g505s: New port Richland APU A10-5750M
Richland APU A10-5750M
8GB RAM
4MB Flash
Boots to working Linux with SeaBIOS payload. S3 works with
Linux 3.16.3-2 Debian Jessie.
Change-Id: I5d05d1b31400fdb9e41c2e011c5b0bf9986fe970
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/7560
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/g505s/agesawrapper.h')
-rw-r--r-- | src/mainboard/lenovo/g505s/agesawrapper.h | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/g505s/agesawrapper.h b/src/mainboard/lenovo/g505s/agesawrapper.h new file mode 100644 index 0000000000..29c0ee8848 --- /dev/null +++ b/src/mainboard/lenovo/g505s/agesawrapper.h @@ -0,0 +1,60 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _AGESAWRAPPER_H_ +#define _AGESAWRAPPER_H_ + +#include <stdint.h> +#include <vendorcode/amd/agesa/f15tn/AGESA.h> + +/* Define AMD Ontario APPU SSID/SVID */ +#define AMD_APU_SVID 0x1022 +#define AMD_APU_SSID 0x1234 +#define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS + +enum { + PICK_DMI, /* DMI Interface */ + PICK_PSTATE, /* Acpi Pstate SSDT Table */ + PICK_SRAT, /* SRAT Table */ + PICK_SLIT, /* SLIT Table */ + PICK_WHEA_MCE, /* WHEA MCE table */ + PICK_WHEA_CMC, /* WHEA CMV table */ + PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ + PICK_IVRS, /* IOMMU ACPI IVRS(I/O Virtualization Reporting Structure) table */ +}; + +AGESA_STATUS agesawrapper_amdinitreset(void); +AGESA_STATUS agesawrapper_amdinitearly(void); +AGESA_STATUS agesawrapper_amdinitenv(void); +AGESA_STATUS agesawrapper_amdinitlate(void); +AGESA_STATUS agesawrapper_amdinitpost(void); +AGESA_STATUS agesawrapper_amdinitmid(void); +AGESA_STATUS agesawrapper_amdreadeventlog (UINT8 HeapStatus); +AGESA_STATUS agesawrapper_amdinitmmio(void); +uint32_t agesawrapper_amdinitcpuio(void); +void *agesawrapper_getlateinitptr (int pick); +AGESA_STATUS agesawrapper_amdlaterunaptask (UINT32 Func, UINT32 Data, void *ConfigPtr); +AGESA_STATUS agesawrapper_amdS3Save(void); +AGESA_STATUS agesawrapper_amdinitresume(void); +AGESA_STATUS agesawrapper_amds3laterestore(void); + +AGESA_STATUS agesawrapper_fchs3earlyrestore(void); +AGESA_STATUS agesawrapper_fchs3laterestore(void); + +#endif |