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authorPatrick Georgi <pgeorgi@google.com>2020-05-10 16:41:01 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-05-11 17:11:40 +0000
commit6b5bc77c9b22c398262ff3f4dae3e14904c57366 (patch)
treeab40c703d92f906f8604635f091f809b59233efa /src/mainboard/lenovo/g505s/acpi
parenta83c6bc907b8ef77935ba62789bc4ed60716986d (diff)
treewide: Remove "this file is part of" lines
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/g505s/acpi')
-rw-r--r--src/mainboard/lenovo/g505s/acpi/ec.asl1
-rw-r--r--src/mainboard/lenovo/g505s/acpi/gpe.asl1
-rw-r--r--src/mainboard/lenovo/g505s/acpi/mainboard.asl1
-rw-r--r--src/mainboard/lenovo/g505s/acpi/routing.asl1
-rw-r--r--src/mainboard/lenovo/g505s/acpi/si.asl1
-rw-r--r--src/mainboard/lenovo/g505s/acpi/sleep.asl1
-rw-r--r--src/mainboard/lenovo/g505s/acpi/superio.asl1
-rw-r--r--src/mainboard/lenovo/g505s/acpi/usb_oc.asl1
8 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/lenovo/g505s/acpi/ec.asl b/src/mainboard/lenovo/g505s/acpi/ec.asl
index 0c112614a2..59868a9882 100644
--- a/src/mainboard/lenovo/g505s/acpi/ec.asl
+++ b/src/mainboard/lenovo/g505s/acpi/ec.asl
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Defines EC bits specific to the mainboard, needed by EC ASL */
diff --git a/src/mainboard/lenovo/g505s/acpi/gpe.asl b/src/mainboard/lenovo/g505s/acpi/gpe.asl
index 56c0b6cf80..dda8ce5134 100644
--- a/src/mainboard/lenovo/g505s/acpi/gpe.asl
+++ b/src/mainboard/lenovo/g505s/acpi/gpe.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Scope(\_GPE) { /* Start Scope GPE */
diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
index fc8fb72d95..059794ec30 100644
--- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl
+++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Data to be patched by the BIOS during POST */
/* FIXME the patching is not done yet! */
diff --git a/src/mainboard/lenovo/g505s/acpi/routing.asl b/src/mainboard/lenovo/g505s/acpi/routing.asl
index 3c5d592ba6..bf6a881405 100644
--- a/src/mainboard/lenovo/g505s/acpi/routing.asl
+++ b/src/mainboard/lenovo/g505s/acpi/routing.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Routing is in System Bus scope */
Name(PR0, Package(){
diff --git a/src/mainboard/lenovo/g505s/acpi/si.asl b/src/mainboard/lenovo/g505s/acpi/si.asl
index e46f267284..3e1317a2b3 100644
--- a/src/mainboard/lenovo/g505s/acpi/si.asl
+++ b/src/mainboard/lenovo/g505s/acpi/si.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
Scope(\_SI) {
Method(_SST, 1) {
/* DBGO("\\_SI\\_SST\n") */
diff --git a/src/mainboard/lenovo/g505s/acpi/sleep.asl b/src/mainboard/lenovo/g505s/acpi/sleep.asl
index c65979df55..5b78d603bd 100644
--- a/src/mainboard/lenovo/g505s/acpi/sleep.asl
+++ b/src/mainboard/lenovo/g505s/acpi/sleep.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* Wake status package */
Name(WKST,Package(){Zero, Zero})
diff --git a/src/mainboard/lenovo/g505s/acpi/superio.asl b/src/mainboard/lenovo/g505s/acpi/superio.asl
index 264c0932d8..6a6b217e17 100644
--- a/src/mainboard/lenovo/g505s/acpi/superio.asl
+++ b/src/mainboard/lenovo/g505s/acpi/superio.asl
@@ -1,4 +1,3 @@
-/* This file is part of the coreboot project. */
/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Defines EC bits specific to the mainboard, needed by EC ASL */
diff --git a/src/mainboard/lenovo/g505s/acpi/usb_oc.asl b/src/mainboard/lenovo/g505s/acpi/usb_oc.asl
index c2e4390e61..d90fffdd40 100644
--- a/src/mainboard/lenovo/g505s/acpi/usb_oc.asl
+++ b/src/mainboard/lenovo/g505s/acpi/usb_oc.asl
@@ -1,5 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-/* This file is part of the coreboot project. */
/* USB overcurrent mapping pins. */
Name(UOM0, 0)