src/mainboard/getac - kontron: Add space around operators

Change-Id: If3cdfdff60c92e3427f1b285e2bca92e2bb2a1cb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16640
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

5 files changed, 42 insertions, 42 deletions

diff --git a/src/mainboard/kontron/986lcd-m/irq_tables.c b/src/mainboard/kontron/986lcd-m/irq_tables.c
index 2e59f9344d..0c5f403f46 100644
--- a/src/mainboard/kontron/986lcd-m/irq_tables.c
+++ b/src/mainboard/kontron/986lcd-m/irq_tables.c
@@ -20,7 +20,7 @@ static const struct irq_routing_table intel_irq_routing_table = {
 	PIRQ_VERSION,    /* u16 version   */
 	32+16*CONFIG_IRQ_SLOT_COUNT,	 /* There can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
 	0x00,		 /* Where the interrupt router lies (bus) */
-	(0x1f<<3)|0x0,   /* Where the interrupt router lies (dev) */
+	(0x1f << 3)|0x0,   /* Where the interrupt router lies (dev) */
 	0,		 /* IRQs devoted exclusively to PCI usage */
 	0x8086,		 /* Vendor */
 	0x27b0,		 /* Device */
@@ -28,25 +28,25 @@ static const struct irq_routing_table intel_irq_routing_table = {
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
 	0xf,		 /* u8 checksum. */
 	{
-		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
-		{0x00,(0x01<<3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // PCIe?
-		{0x00,(0x02<<3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // VGA
-		{0x00,(0x1e<<3)|0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // PCI bridge
-		{0x00,(0x1f<<3)|0x0, {{0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // LPC
-		{0x00,(0x1d<<3)|0x0, {{0x6b, 0xdcf8}, {0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x60, 0x0dcf8}}, 0x0, 0x0}, // USB#1
-		{0x00,(0x1b<<3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Audio device
-		{0x00,(0x1c<<3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x2, 0x0}, // PCIe bridge
-		{0x04,(0x00<<3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Firewire
-		{0x04,(0x01<<3)|0x0, {{0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0x0dcf8}}, 0x1, 0x0}, // PCI Bridge
-		{0x04,(0x02<<3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x2, 0x0},
-		{0x04,(0x03<<3)|0x0, {{0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0x0dcf8}}, 0x3, 0x0},
-		{0x04,(0x04<<3)|0x0, {{0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0x0dcf8}}, 0x4, 0x0},
-		{0x04,(0x05<<3)|0x0, {{0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0x0dcf8}}, 0x5, 0x0},
-		{0x04,(0x06<<3)|0x0, {{0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0xdcf8}, {0x63, 0x0dcd8}}, 0x6, 0x0},
-		{0x04,(0x09<<3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x9, 0x0},
-		{0x01,(0x00<<3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // Ethernet 8168
-		{0x02,(0x00<<3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x9, 0x0},
-		{0x03,(0x00<<3)|0x0, {{0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x60, 0x0dcf8}}, 0xa, 0x0},
+		/* bus,       dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
+		{0x00,(0x01 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // PCIe?
+		{0x00,(0x02 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // VGA
+		{0x00,(0x1e << 3)|0x0, {{0x61, 0xdcf8}, {0x68, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // PCI bridge
+		{0x00,(0x1f << 3)|0x0, {{0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // LPC
+		{0x00,(0x1d << 3)|0x0, {{0x6b, 0xdcf8}, {0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x60, 0x0dcf8}}, 0x0, 0x0}, // USB#1
+		{0x00,(0x1b << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Audio device
+		{0x00,(0x1c << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x2, 0x0}, // PCIe bridge
+		{0x04,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0}, // Firewire
+		{0x04,(0x01 << 3)|0x0, {{0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0x0dcf8}}, 0x1, 0x0}, // PCI Bridge
+		{0x04,(0x02 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x2, 0x0},
+		{0x04,(0x03 << 3)|0x0, {{0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0x0dcf8}}, 0x3, 0x0},
+		{0x04,(0x04 << 3)|0x0, {{0x6b, 0xdcf8}, {0x68, 0xdcf8}, {0x69, 0xdcf8}, {0x6a, 0x0dcf8}}, 0x4, 0x0},
+		{0x04,(0x05 << 3)|0x0, {{0x63, 0xdcd8}, {0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0x0dcf8}}, 0x5, 0x0},
+		{0x04,(0x06 << 3)|0x0, {{0x62, 0xdcf8}, {0x61, 0xdcf8}, {0x60, 0xdcf8}, {0x63, 0x0dcd8}}, 0x6, 0x0},
+		{0x04,(0x09 << 3)|0x0, {{0x69, 0xdcf8}, {0x6a, 0xdcf8}, {0x6b, 0xdcf8}, {0x68, 0x0dcf8}}, 0x9, 0x0},
+		{0x01,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x0, 0x0}, // Ethernet 8168
+		{0x02,(0x00 << 3)|0x0, {{0x60, 0xdcf8}, {0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0x0dcd8}}, 0x9, 0x0},
+		{0x03,(0x00 << 3)|0x0, {{0x61, 0xdcf8}, {0x62, 0xdcf8}, {0x63, 0xdcd8}, {0x60, 0x0dcf8}}, 0xa, 0x0},
 	}
 };
 
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 3dcf4cc54e..e9143a84e3 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -57,7 +57,7 @@ static void ich7_enable_lpc(void)
 {
 	int lpt_en = 0;
 	if (read_option(lpt, 0) != 0) {
-		lpt_en = 1<<2; // enable LPT
+		lpt_en = 1 << 2; // enable LPT
 	}
 	// Enable Serial IRQ
 	pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x64, 0xd0);
@@ -98,7 +98,7 @@ static void early_superio_config_w83627thg(void)
 {
 	device_t dev;
 
-	dev=PNP_DEV(0x2e, W83627THG_SP1);
+	dev = PNP_DEV(0x2e, W83627THG_SP1);
 	pnp_enter_func_mode(dev);
 
 	pnp_write_config(dev, 0x24, 0xc6); // PNPCSV
@@ -106,14 +106,14 @@ static void early_superio_config_w83627thg(void)
 	pnp_write_config(dev, 0x29, 0x43); // GPIO settings
 	pnp_write_config(dev, 0x2a, 0x40); // GPIO settings
 
-	dev=PNP_DEV(0x2e, W83627THG_SP1);
+	dev = PNP_DEV(0x2e, W83627THG_SP1);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0x3f8);
 	pnp_set_irq(dev, PNP_IDX_IRQ0, 4);
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x2e, W83627THG_SP2);
+	dev = PNP_DEV(0x2e, W83627THG_SP2);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0x2f8);
@@ -121,7 +121,7 @@ static void early_superio_config_w83627thg(void)
 	// pnp_write_config(dev, 0xf1, 4); // IRMODE0
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x2e, W83627THG_KBC);
+	dev = PNP_DEV(0x2e, W83627THG_KBC);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0x60);
@@ -129,33 +129,33 @@ static void early_superio_config_w83627thg(void)
 	// pnp_write_config(dev, 0xf0, 0x82);
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x2e, W83627THG_GAME_MIDI_GPIO1);
+	dev = PNP_DEV(0x2e, W83627THG_GAME_MIDI_GPIO1);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 	pnp_write_config(dev, 0xf5, 0xff); // invert all GPIOs
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x2e, W83627THG_GPIO2);
+	dev = PNP_DEV(0x2e, W83627THG_GPIO2);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 1); // Just enable it
 
-	dev=PNP_DEV(0x2e, W83627THG_GPIO3);
+	dev = PNP_DEV(0x2e, W83627THG_GPIO3);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 	pnp_write_config(dev, 0xf0, 0xfb); // GPIO bit 2 is output
 	pnp_write_config(dev, 0xf1, 0x00); // GPIO bit 2 is 0
 	pnp_write_config(dev, 0x30, 0x03); // Enable GPIO3+4. pnp_set_enable is not sufficient
 
-	dev=PNP_DEV(0x2e, W83627THG_FDC);
+	dev = PNP_DEV(0x2e, W83627THG_FDC);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 
-	dev=PNP_DEV(0x2e, W83627THG_PP);
+	dev = PNP_DEV(0x2e, W83627THG_PP);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 
 	/* Enable HWM */
-	dev=PNP_DEV(0x2e, W83627THG_HWM);
+	dev = PNP_DEV(0x2e, W83627THG_HWM);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0xa00);
@@ -163,7 +163,7 @@ static void early_superio_config_w83627thg(void)
 
 	pnp_exit_func_mode(dev);
 
-	dev=PNP_DEV(0x4e, W83627THG_SP1);
+	dev = PNP_DEV(0x4e, W83627THG_SP1);
 	pnp_enter_func_mode(dev);
 
 	pnp_set_logical_device(dev); // Set COM3 to sane non-conflicting values
@@ -172,22 +172,22 @@ static void early_superio_config_w83627thg(void)
 	pnp_set_irq(dev, PNP_IDX_IRQ0, 11);
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x4e, W83627THG_SP2);
+	dev = PNP_DEV(0x4e, W83627THG_SP2);
 	pnp_set_logical_device(dev); // Set COM4 to sane non-conflicting values
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0x2e8);
 	pnp_set_irq(dev, PNP_IDX_IRQ0, 10);
 	pnp_set_enable(dev, 1);
 
-	dev=PNP_DEV(0x4e, W83627THG_FDC);
+	dev = PNP_DEV(0x4e, W83627THG_FDC);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 
-	dev=PNP_DEV(0x4e, W83627THG_PP);
+	dev = PNP_DEV(0x4e, W83627THG_PP);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 
-	dev=PNP_DEV(0x4e, W83627THG_KBC);
+	dev = PNP_DEV(0x4e, W83627THG_KBC);
 	pnp_set_logical_device(dev);
 	pnp_set_enable(dev, 0);
 	pnp_set_iobase(dev, PNP_IDX_IO0, 0x00);
diff --git a/src/mainboard/kontron/kt690/fadt.c b/src/mainboard/kontron/kt690/fadt.c
index f9768b20bd..6ebd04897f 100644
--- a/src/mainboard/kontron/kt690/fadt.c
+++ b/src/mainboard/kontron/kt690/fadt.c
@@ -56,7 +56,7 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 
 	fadt->firmware_ctrl = (u32) facs;
 	fadt->dsdt = (u32) dsdt;
-	/* 3=Workstation,4=Enterprise Server, 7=Performance Server */
+	/* 3=Workstation, 4=Enterprise Server, 7=Performance Server */
 	fadt->preferred_pm_profile = 0x03;
 	fadt->sci_int = 9;
 	/* disable system management mode by setting to 0: */
@@ -85,11 +85,11 @@ void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
 	pm_iowrite(0x2C, ACPI_PMA_CNT_BLK & 0xFF);
 	pm_iowrite(0x2D, ACPI_PMA_CNT_BLK >> 8);
 
-	pm_iowrite(0x0E, 1<<3 | 0<<2); /* AcpiDecodeEnable, When set, SB uses
+	pm_iowrite(0x0E, 1 << 3 | 0 << 2); /* AcpiDecodeEnable, When set, SB uses
 					* the contents of the PM registers at
 					* index 20-2B to decode ACPI I/O address.
 					* AcpiSmiEn & SmiCmdEn*/
-	pm_iowrite(0x10, 1<<1 | 1<<3| 1<<5); /* RTC_En_En, TMR_En_En, GBL_EN_EN */
+	pm_iowrite(0x10, 1 << 1 | 1 << 3| 1 << 5); /* RTC_En_En, TMR_En_En, GBL_EN_EN */
 	outl(0x1, ACPI_PM1_CNT_BLK);		  /* set SCI_EN */
 
 	fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
diff --git a/src/mainboard/kontron/kt690/mptable.c b/src/mainboard/kontron/kt690/mptable.c
index 39192b071c..8895163651 100644
--- a/src/mainboard/kontron/kt690/mptable.c
+++ b/src/mainboard/kontron/kt690/mptable.c
@@ -69,7 +69,7 @@ static void *smp_write_config_table(void *v)
 			dword = pci_read_config32(dev, 0xac);
 			dword &= ~(7 << 26);
 			dword |= 6 << 26;	/* 0: INTA, ...., 7: INTH */
-			/* dword |= 1<<22; PIC and APIC co exists */
+			/* dword |= 1 << 22; PIC and APIC co exists */
 			pci_write_config32(dev, 0xac, dword);
 
 			/*
diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c
index cb33e3b9bc..d25799f83f 100644
--- a/src/mainboard/kontron/kt690/romstage.c
+++ b/src/mainboard/kontron/kt690/romstage.c
@@ -111,7 +111,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	cpuid1 = cpuid(0x80000007);
 	if ((cpuid1.edx & 0x6) == 0x6) {
 		/* Read FIDVID_STATUS */
-		msr=rdmsr(0xc0010042);
+		msr = rdmsr(0xc0010042);
 		printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
 
 		enable_fid_change();
@@ -119,7 +119,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		init_fidvid_bsp(bsp_apicid);
 
 		/* show final fid and vid */
-		msr=rdmsr(0xc0010042);
+		msr = rdmsr(0xc0010042);
 		printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
 	} else {
 		printk(BIOS_DEBUG, "Changing FIDVID not supported\n");