diff options
| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-06-20 17:26:21 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:18:22 +0000 |
| commit | 0fcd37172f22a55fecd5ae6752fc18218b88a8f3 (patch) | |
| tree | 760464e8fd493cfe65e3efd4a0920937db506ab5 /src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb | |
| parent | 0948b363b0568e70af2352566dee39e0df82d96d (diff) | |
mb/kontron: Add Kontron mAL10 COMe module support
This patch adds support for the Kontron mAL10 COMe module with the
Apollo Lake SoC together with Kontron T10-TNI carrierboard.
Working:
- UART console and I2C on Kontron kempld;
- USB2/3
- Ethernet controller
- eMMC
- SATA
- PCIe ports
- IGD/DP
- SMBus
- HWM
Not tested:
- IGD/LVDS
- SDIO
TODO:
- HDA (codec IDT 92HD73C1X5, currently disabled)
Tested payloads:
- SeaBIOS
- Tianocore, UEFIPayload - without video, EFI-shell in console only
Tested on COMe module with Intel Atom x5-E3940 processor (4 Core,
1.6/1.8GHz, 9.5W TDP). Xubuntu 18.04.2 was used as a bootable OS
(5.0.0-32-generic linux kernel)
Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb')
| -rw-r--r-- | src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb b/src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb new file mode 100644 index 0000000000..9248c0c21c --- /dev/null +++ b/src/mainboard/kontron/mal10/carriers/t10-tni/overridetree.cb @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0-only + +chip soc/intel/apollolake + + device cpu_cluster 0 on + device lapic 0 on end + end + + # Override USB port configuration + register "usb_config_override" = "1" + # USB 2.0 + register "usb2_port[0]" = "PORT_EN(OC1)" + register "usb2_port[1]" = "PORT_EN(OC1)" + register "usb2_port[2]" = "PORT_EN(OC1)" + register "usb2_port[3]" = "PORT_EN(OC1)" + register "usb2_port[4]" = "PORT_EN(OC1)" + register "usb2_port[5]" = "PORT_EN(OC1)" + register "usb2_port[6]" = "PORT_EN(OC_SKIP)" + register "usb2_port[7]" = "PORT_EN(OC_SKIP)" + # USB 3.0 + register "usb3_port[0]" = "PORT_EN(OC0)" + register "usb3_port[1]" = "PORT_EN(OC0)" + + device domain 0 on + device pci 0e.0 off end # TODO: Audio + device pci 13.0 on # PCIe-A 1 (Root Port 2) + register "pcie_rp_clkreq_pin[2]" = "0" + end + device pci 13.1 on # PCIe-A 2 (Root Port 3) + register "pcie_rp_clkreq_pin[3]" = "0" + end + device pci 13.2 on # PCIe-A 3 (Root Port 4) + register "pcie_rp_clkreq_pin[4]" = "0" + end + device pci 13.3 on # PCIe-A 4 (Root Port 5) + register "pcie_rp_clkreq_pin[5]" = "0" + end + device pci 14.0 on # PCIe-B 1 (Root Port 0) + register "pcie_rp_clkreq_pin[0]" = "1" + end + end +end |