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authorElyes HAOUAS <ehaouas@noos.fr>2019-02-07 09:00:47 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-02-08 11:00:01 +0000
commit8c905a82f5d07ae7936114d392ec897756c0df9d (patch)
tree51da94b62ccb1acb79e74ea71e7a7201b6ea91a2 /src/mainboard/kontron/ktqm77
parentd5c458f98ad71f66815f637c5cb6305adc133b27 (diff)
mb/{asrock,intel,kontron}: Include missing <arch/io.h>
Also includes lines sorted Change-Id: Idf2b41f471f531b2a9c3e620563e3c658dea4729 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/31267 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/kontron/ktqm77')
-rw-r--r--src/mainboard/kontron/ktqm77/romstage.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c
index 9083764284..ea93e05379 100644
--- a/src/mainboard/kontron/ktqm77/romstage.c
+++ b/src/mainboard/kontron/ktqm77/romstage.c
@@ -16,18 +16,20 @@
#include <stdint.h>
#include <string.h>
-#include <timestamp.h>
-#include <device/pci_def.h>
-#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
-#include <northbridge/intel/sandybridge/sandybridge.h>
-#include <northbridge/intel/sandybridge/raminit.h>
+#include <arch/io.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/x86/msr.h>
+#include <device/pci_def.h>
+#include <halt.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <northbridge/intel/sandybridge/raminit.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <cpu/x86/msr.h>
-#include <halt.h>
#include <superio/winbond/common/winbond.h>
+#include <timestamp.h>
+
void pch_enable_lpc(void)
{