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| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-05-24 02:04:52 +1000 |
|---|---|---|
| committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-05-23 19:41:56 +0200 |
| commit | 6f49f69ed0c46efd57c221c3e5ab163becb19897 (patch) | |
| tree | a0c2eaf60c24d35fe0708043317d82bb8479158f /src/mainboard/kontron/ktqm77/romstage.c | |
| parent | a0427cb84415d143db595b7b359a5edb55ebdb64 (diff) | |
mainboard/kontron/ktqm77: Fix usage of GNU field designator ext
Following the reasoning in,
8089f17 mainboard/lenovo/x230 Fix usage of GNU field designator extension
In C99 we defined a syntax for this. GCC's old syntax was deprecated.
Change-Id: If948960abbd927aa6d2b471a42a2321a04d992f3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5824
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/kontron/ktqm77/romstage.c')
| -rw-r--r-- | src/mainboard/kontron/ktqm77/romstage.c | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index b5959b1bec..7385cd0c16 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -157,34 +157,34 @@ void main(unsigned long bist) u16 pm1_sts; struct pei_data pei_data = { - pei_version: PEI_VERSION, - mchbar: DEFAULT_MCHBAR, - dmibar: DEFAULT_DMIBAR, - epbar: DEFAULT_EPBAR, - pciexbar: CONFIG_MMCONF_BASE_ADDRESS, - smbusbar: SMBUS_IO_BASE, - wdbbar: 0x4000000, - wdbsize: 0x1000, - hpet_address: CONFIG_HPET_ADDRESS, - rcba: DEFAULT_RCBABASE, - pmbase: DEFAULT_PMBASE, - gpiobase: DEFAULT_GPIOBASE, - thermalbase: 0xfed08000, - system_type: 0, // 0 Mobile, 1 Desktop/Server - tseg_size: CONFIG_SMM_TSEG_SIZE, - spd_addresses: { 0xA0, 0x00,0xA4,0x00 }, - ts_addresses: { 0x00, 0x00, 0x00, 0x00 }, - ec_present: 1, - gbe_enable: 1, - ddr3lv_support: 0, + .pei_version = PEI_VERSION, + .mchbar = DEFAULT_MCHBAR, + .dmibar = DEFAULT_DMIBAR, + .epbar = DEFAULT_EPBAR, + .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, + .smbusbar = SMBUS_IO_BASE, + .wdbbar = 0x4000000, + .wdbsize = 0x1000, + .hpet_address = CONFIG_HPET_ADDRESS, + .rcba = DEFAULT_RCBABASE, + .pmbase = DEFAULT_PMBASE, + .gpiobase = DEFAULT_GPIOBASE, + .thermalbase = 0xfed08000, + .system_type = 0, // 0 Mobile, 1 Desktop/Server + .tseg_size = CONFIG_SMM_TSEG_SIZE, + .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, + .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, + .ec_present = 1, + .gbe_enable = 1, + .ddr3lv_support = 0, // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel // 3 = disable dimm 0+1 on channel - dimm_channel0_disabled: 2, - dimm_channel1_disabled: 2, - max_ddr3_freq: 1600, - usb_port_config: { + .dimm_channel0_disabled = 2, + .dimm_channel1_disabled = 2, + .max_ddr3_freq = 1600, + .usb_port_config = { /* enabled usb oc pin length */ { 1, 0, 0x0040 }, /* P0: lower left USB 3.0 (OC0) */ { 1, 0, 0x0040 }, /* P1: upper left USB 3.0 (OC0) */ @@ -201,13 +201,13 @@ void main(unsigned long bist) { 1, 4, 0x0040 }, /* P12: internal USB 2.0 (OC4) */ { 1, 4, 0x0040 }, /* P13: internal USB 2.0 (OC4) */ }, - usb3: { - mode: 3, /* Smart Auto? */ - hs_port_switch_mask: 0xf, /* All four ports. */ - preboot_support: 1, /* preOS driver? */ - xhci_streams: 1, /* Enable. */ + .usb3 = { + .mode = 3, /* Smart Auto? */ + .hs_port_switch_mask = 0xf, /* All four ports. */ + .preboot_support = 1, /* preOS driver? */ + .xhci_streams = 1, /* Enable. */ }, - pcie_init: 1, + .pcie_init = 1, }; timestamp_init(get_initial_timestamp()); |