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authorMyles Watson <mylesgw@gmail.com>2009-10-15 13:16:40 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-15 13:16:40 +0000
commit45b811b13552a94af4713b77613d377561e4ef26 (patch)
treef78b62ccb9987301d2b40725ac4ba386e0f9f283 /src/mainboard/kontron/kt690/devicetree.cb
parent74cb9eb7e75bceadb0ebd2eee5b26f27934e5750 (diff)
Add Kconfig support for kontron/kt960.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/kontron/kt690/devicetree.cb')
-rw-r--r--src/mainboard/kontron/kt690/devicetree.cb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/kontron/kt690/devicetree.cb b/src/mainboard/kontron/kt690/devicetree.cb
index b68bbbced6..e26350ccda 100644
--- a/src/mainboard/kontron/kt690/devicetree.cb
+++ b/src/mainboard/kontron/kt690/devicetree.cb
@@ -2,7 +2,7 @@
#Define vga_rom_address = 0xfff0000
#Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
#Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
-# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
+# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
#Define gfx_dual_slot, 0: single slot, 1: dual slot
#Define gfx_lane_reversal, 0: disable lane reversal, 1: enable
#Define gfx_tmds, 0: didn't support TMDS, 1: support
@@ -106,10 +106,10 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0xa10
end
device pnp 2e.c off # PECI, SST
- endif
-
+ end
end #superio/winbond/w83627dhg
#chip superio/smsc/fdc37n972
+ # seems this chip is not used?
#end
end #LPC
device pci 14.4 on end # PCI 0x4384