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authorPatrick Georgi <patrick@georgi-clan.de>2011-05-10 21:53:13 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2011-05-10 21:53:13 +0000
commitb251753b4fae1e827f5398daf679773eba643dce (patch)
tree3e5f0b12e9a036f36c7c8bdffab8845637748453 /src/mainboard/kontron/986lcd-m
parent6649d9740d79b8c52d40218d78393547aaad7548 (diff)
Change read_option() to a macro that wraps some API uglyness
Simplify read_option(CMOS_VSTART_foo, CMOS_VLEN_foo, somedefault) to read_option(foo, somedefault) Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6565 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/kontron/986lcd-m')
-rw-r--r--src/mainboard/kontron/986lcd-m/romstage.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 357adec08b..0d6816ca39 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -59,7 +59,7 @@ void setup_ich7_gpios(void)
static void ich7_enable_lpc(void)
{
int lpt_en = 0;
- if (read_option(CMOS_VSTART_lpt, CMOS_VLEN_lpt, 0) != 0) {
+ if (read_option(lpt, 0) != 0) {
lpt_en = 1<<2; // enable LPT
}
// Enable Serial IRQ
@@ -228,18 +228,18 @@ static void rcba_config(void)
reg32 = FD_ACMOD|FD_ACAUD|FD_PATA;
reg32 |= FD_PCIE6|FD_PCIE5|FD_PCIE4;
- if (read_option(CMOS_VSTART_ethernet1, CMOS_VLEN_ethernet1, 0) != 0) {
+ if (read_option(ethernet1, 0) != 0) {
printk(BIOS_DEBUG, "Disabling ethernet adapter 1.\n");
reg32 |= FD_PCIE1;
}
- if (read_option(CMOS_VSTART_ethernet2, CMOS_VLEN_ethernet2, 0) != 0) {
+ if (read_option(ethernet2, 0) != 0) {
printk(BIOS_DEBUG, "Disabling ethernet adapter 2.\n");
reg32 |= FD_PCIE2;
} else {
if (reg32 & FD_PCIE1)
port_shuffle = 1;
}
- if (read_option(CMOS_VSTART_ethernet3, CMOS_VLEN_ethernet3, 0) != 0) {
+ if (read_option(ethernet3, 0) != 0) {
printk(BIOS_DEBUG, "Disabling ethernet adapter 3.\n");
reg32 |= FD_PCIE3;
} else {