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authorVladimir Serbinenko <phcoder@gmail.com>2014-10-25 15:18:25 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-11-04 23:02:27 +0100
commitab83ef02c7131d23a28c6acbd79e6cd9997dcec8 (patch)
tree2a04f314104c3a43e6eaaacd5cceb5ec8db81386 /src/mainboard/kontron/986lcd-m/devicetree.cb
parent9c4f1b8e05fbd659ebdb3d03d811f1ad39079a1a (diff)
i82801gx: Handle whole FADT in southbridge.
Do all the handling in SB code with few parameters from devicetree.cb instead of having mobo callbacks. Change-Id: I8fd02ff05553a3c51ea5f6ae66b8f5502509e2bc Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7199 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard/kontron/986lcd-m/devicetree.cb')
-rw-r--r--src/mainboard/kontron/986lcd-m/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/kontron/986lcd-m/devicetree.cb b/src/mainboard/kontron/986lcd-m/devicetree.cb
index 65a96a0aa7..dee2fdacd1 100644
--- a/src/mainboard/kontron/986lcd-m/devicetree.cb
+++ b/src/mainboard/kontron/986lcd-m/devicetree.cb
@@ -32,6 +32,8 @@ chip northbridge/intel/i945
register "ide_enable_primary" = "0x1"
register "ide_enable_secondary" = "0x1"
register "sata_ahci" = "0x0"
+ register "c3_latency" = "85"
+ register "p_cnt_throttling_supported" = "0"
device pci 1b.0 on end # High Definition Audio
device pci 1c.0 on end # PCIe