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authorMichael Niewöhner <foss@mniewoehner.de>2019-11-02 12:14:06 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-11 10:26:14 +0000
commite919390f4735a762234630ab7e0807c14de45421 (patch)
tree00a607d365f06c75fc7f34ee7ef8a2c6b0d0f042 /src/mainboard/jetway
parent93d215cb05a05464fef14f26f638341da2ce3d59 (diff)
soc/intel/icelake: add soc implementation for ETR address API
Add soc implementation for the new ETR address API. Change-Id: I8383a60c2c4988948ab8b3e9a54330269d217868 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36568 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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