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author | Michael Niewöhner <foss@mniewoehner.de> | 2019-11-02 12:14:06 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-11 10:26:03 +0000 |
commit | b4d960b65aa126d4534189672322ec62dcd87bde (patch) | |
tree | e74f0d24e098b2f7ba1dbb15d3098aa762585425 /src/mainboard/jetway | |
parent | 28552095d8a4eee588923a11c3f3921a2492b140 (diff) |
soc/intel/apollolake: add soc implementation for ETR address API
Add soc implementation for the new ETR address API.
Change-Id: I1832f5f14055fc3dbb502289035130ca7a5d6d33
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/jetway')
0 files changed, 0 insertions, 0 deletions