diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-11-29 16:46:49 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-05 14:07:57 +0000 |
| commit | ad41f5512306d118047d2f7243678ddb32b4b06b (patch) | |
| tree | 3c462fefc8006a67a20e9324b6a901c1ba342984 /src/mainboard/jetway | |
| parent | 378ec8b0de5216b18ab5f2ca2f1ee0b0c29888ea (diff) | |
google/sarien: Increase BIOS region to 28MB
Platform have a 32MB SPI chip, so we can increase the bios region from
16MB to 28MB.
BUG=b:119267832
TEST=Build and boot fine on sarien platform.
Change-Id: I9bc0fa0f662e5ec64e77f2005dbb2e7edb8b2524
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/29945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/jetway')
0 files changed, 0 insertions, 0 deletions