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authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2018-05-16 14:08:33 -0700
committerMartin Roth <martinroth@google.com>2018-06-13 14:24:42 +0000
commit93459d6278f1557f3e38c33b79a8fd739aa7ff68 (patch)
tree1634a2374ca5409bac233e126db330e0e3927787 /src/mainboard/jetway
parent572f4988ddb3b85bdce019de7d6a594bea070bfb (diff)
soc/amd/stoneyridge/acpi.c: Create GPIO acpigen procedures
There are some acpigen functionality that have not been implemented. They are defined as week within acpigen.c, in order to not break the build. This adds stoneyridge specific versions. BUG=b:79546790 TEST=Build grunt with added debug code to gpio_lib.asl. Boot to OS, activate ACPI debug, activate S3 stress test. Interrupt stress test, do a "cat /var/log/messages" saving the serial output. Examine the serial output, see added debug code showing action taken. Confirm action by reading proper register. Debug code removed. Change-Id: I9062d889f828a3175b89e6f4a3659ebbf90eac68 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/26335 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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