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authorTom Warren <twarren@nvidia.com>2014-08-18 13:18:58 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-03-27 08:03:18 +0100
commitc65d8c48df9954b7a298de72b08b71fef92472d5 (patch)
tree7f4e8594d218b1d037e71b748a6657967cbab5cc /src/mainboard/jetway/pa78vm5/dsdt.asl
parent2152e85e12413532f2c5d4281267c0a5f604211c (diff)
tegra132: separate/refactor clock enable/reset code
Added distinct functions for clock_enable and clock_clear_reset, and rewrote clock_enable_clear_reset() to use them. Useful when unpowergating SOR partition, for instance, where we need to enable a bunch of periph clocks, unclamp SOR, then take all of those periphs out of reset. BUG=none BRANCH=none TEST=none, built rush/ryu OK. Change-Id: I92edf3104adc8eb7637c47a5e000788fd55f1452 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 4fd76a6d0d0fb7922c6beacbc1cfcb365b6537b2 Original-Change-Id: I6fef5a72421cb4e3d7edb33a66f62b6e14865a32 Original-Signed-off-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/212916 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8991 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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