diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-03-29 17:54:26 +1100 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-06 06:12:45 +0200 |
| commit | 5ff4b086ba1c1ff1e82ef5b7db1e776aeff3fcb7 (patch) | |
| tree | 8a2ed46a3ff167915421304eed90cd9879fd4e86 /src/mainboard/jetway/nf81-t56n-lf/romstage.c | |
| parent | 3c04917a0023d383a06ed0d4215d7d50e7798059 (diff) | |
jetway/nf81-t56n-lf: Sanitize #includes
Following the same reasoning as commit
1d87dac hp/pavilion_m6_1035dx: Sanitize #includes
Clean up the #include directives in this board support.
Change-Id: I97b73a349ca7e49b413d7c04900f25076488dde4
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5414
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/romstage.c')
| -rw-r--r-- | src/mainboard/jetway/nf81-t56n-lf/romstage.c | 35 |
1 files changed, 19 insertions, 16 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c index 12149210b6..846d5c76f4 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c +++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c @@ -18,30 +18,33 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <stdint.h> -#include <string.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> +#include "agesawrapper.h" + +#include <arch/cpu.h> #include <arch/io.h> #include <arch/stages.h> -#include <device/pnp_def.h> -#include <arch/cpu.h> -#include <cpu/x86/lapic.h> +#include <cbmem.h> #include <console/console.h> +#include <cpu/amd/agesa/s3_resume.h> +#include <cpu/x86/lapic.h> +#include <cpu/x86/bist.h> + +#include <device/pci_def.h> +#include <device/pci_ids.h> +#include <stdint.h> +#include <string.h> + #include <console/loglevel.h> #include <cpu/x86/mtrr.h> -#include "agesawrapper.h" -#include "cpu/x86/bist.h" +#include <cpu/x86/cache.h> +#include <cpu/amd/mtrr.h> +#include <sb_cimx.h> +#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> #include "superio/fintek/f71869ad/f71869ad.h" -#include "cpu/x86/lapic.h" + +/* FIXME: should not include .c files */ #include "drivers/pc80/i8254.c" #include "drivers/pc80/i8259.c" -#include <cpu/x86/cache.h> -#include <sb_cimx.h> -#include "SBPLATFORM.h" -#include "cbmem.h" -#include "cpu/amd/mtrr.h" -#include "cpu/amd/agesa/s3_resume.h" void disable_cache_as_ram(void); /* cache_as_ram.inc */ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); |