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author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-05-30 11:35:33 +1000 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-20 19:54:39 +0200 |
commit | d309eb145dbb0e79b0b678dc623949e12c15e02f (patch) | |
tree | f0d8dc086ad4d0c3685eafcdf9da97899ceeffd6 /src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c | |
parent | 4d9b77287e583c89fea4bac9f1c264b01dcab981 (diff) |
mainboard/jetway/nf81-t56n-lf: Port recent Persimmon changes
Port to recent reference board (AMD Persimmon) changes in commits:
c93a75a AMD/CIMx: Add functions for AMD PCI IRQ routing
Change-Id: I307709bfee554bc64788a973da6d9313ca7c0de2
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5882
Tested-by: build bot (Jenkins)
Reviewed-by: Mike Loptien <mike.loptien@se-eng.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c')
-rw-r--r-- | src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c b/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c index 8fb079537c..688f9dd929 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c +++ b/src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c @@ -19,6 +19,7 @@ #include "agesawrapper.h" +#include <arch/ioapic.h> #include <console/console.h> #include <cpu/amd/amdfam14.h> #include <device/pci.h> @@ -37,6 +38,7 @@ u8 bus_isa; u8 bus_sb800[6]; u32 apicid_sb800; +u32 apicver_sb800; /** * Here you only need to set value in pci1234 for HT-IO that could be @@ -145,7 +147,14 @@ void get_bus_conf(void) /* I/O APICs: APIC ID Version State Address */ bus_isa = 10; apicid_base = CONFIG_MAX_CPUS; - apicid_sb800 = apicid_base; + + /* + * By the time this function gets called, the IOAPIC registers + * have been written so they can be read to get the correct + * APIC ID and Version + */ + apicid_sb800 = (io_apic_read(IO_APIC_ADDR, 0x00) >> 24); + apicver_sb800 = (io_apic_read(IO_APIC_ADDR, 0x01) & 0xFF); #if CONFIG_AMD_SB_CIMX sb_Late_Post(); |