aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
diff options
context:
space:
mode:
authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-04-12 04:12:14 +1000
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-13 05:32:09 +0200
commitc21bd8839b68dbc46b11e50697b041ba2b20d59c (patch)
tree4222369611a68d64954242d4b6929c04263e9952 /src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
parente2f3bfc5b372227223c3ce869e2c82e1dffd469a (diff)
jetway/nf81-t56n-lf: Replace AGESA types with stdint types
Try to use void and uint*_t type specifiers in place of VOID and UINT* respectively. Use const in place of CONST type modifier. Remove some useless type casts. A few unneeded comments containing the AGESA redefenied types are also removed. Change-Id: I4bff96a222507fc35333488331c3f35ef1158132 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/5486 Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/buildOpts.c')
-rw-r--r--src/mainboard/jetway/nf81-t56n-lf/buildOpts.c22
1 files changed, 4 insertions, 18 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
index c6594d314f..aa985a52e1 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c
@@ -240,7 +240,7 @@
*/
/* The fixed MTRR values to be set after memory initialization. */
-CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
+const AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
{
{ AMD_AP_MTRR_FIX64k_00000, 0x1E1E1E1E1E1E1E1Eull },
{ AMD_AP_MTRR_FIX16k_80000, 0x1E1E1E1E1E1E1E1Eull },
@@ -327,7 +327,7 @@ CONST AP_MTRR_SETTINGS ROMDATA OntarioApMtrrSettingsList[] =
* is populated, AGESA will base its settings on the data from the table. Otherwise, it will
* use its default conservative settings.
*/
-CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
+const PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
//
// The following macros are supported (use comma to separate macros):
//
@@ -391,7 +391,7 @@ CONST PSO_ENTRY ROMDATA DefaultPlatformMemoryConfiguration[] = {
//DA Customer table
-CONST UINT8 AGESA_MEM_TABLE_ON[][sizeof (MEM_TABLE_ALIAS)] =
+const uint8_t AGESA_MEM_TABLE_ON[][sizeof (MEM_TABLE_ALIAS)] =
{
// Hardcoded Memory Training Values
@@ -433,18 +433,4 @@ CONST UINT8 AGESA_MEM_TABLE_ON[][sizeof (MEM_TABLE_ALIAS)] =
// TABLE END
NBACCESS (MTEnd, 0, 0, 0, 0, 0), // End of Table
};
-CONST UINT8 SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABLE_ON[0]);
-
-/* ***************************************************************************
- * Optional User code to be included into the AGESA build
- * These may be 32-bit call-out routines...
- */
-//AGESA_STATUS
-//AgesaReadSpd (
-// IN UINTN FcnData,
-// IN OUT AGESA_READ_SPD_PARAMS *ReadSpd
-// )
-//{
-// /* platform code to read an SPD... */
-// return Status;
-//}
+const uint8_t SizeOfTableON = sizeof (AGESA_MEM_TABLE_ON) / sizeof (AGESA_MEM_TABLE_ON[0]);