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author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-03-29 17:54:26 +1100 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-06 06:12:45 +0200 |
commit | 5ff4b086ba1c1ff1e82ef5b7db1e776aeff3fcb7 (patch) | |
tree | 8a2ed46a3ff167915421304eed90cd9879fd4e86 /src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h | |
parent | 3c04917a0023d383a06ed0d4215d7d50e7798059 (diff) |
jetway/nf81-t56n-lf: Sanitize #includes
Following the same reasoning as commit
1d87dac hp/pavilion_m6_1035dx: Sanitize #includes
Clean up the #include directives in this board support.
Change-Id: I97b73a349ca7e49b413d7c04900f25076488dde4
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5414
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h')
-rw-r--r-- | src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h index ec8a6e3648..47ed1a509d 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h +++ b/src/mainboard/jetway/nf81-t56n-lf/PlatformGnbPcieComplex.h @@ -20,10 +20,8 @@ #ifndef _PLATFORM_GNB_PCIE_COMPLEX_H #define _PLATFORM_GNB_PCIE_COMPLEX_H -#include "Porting.h" -#include "AGESA.h" -#include "amdlib.h" -#include <cpu/amd/agesa/s3_resume.h> +#include <vendorcode/amd/agesa/f14/AGESA.h> +#include <vendorcode/amd/agesa/f14/Lib/amdlib.h> //GNB GPP Port4 #define GNB_GPP_PORT4_PORT_PRESENT 1 //0:Disable 1:Enable |