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authorFred Reitberger <reitbergerfred@gmail.com>2022-11-04 09:16:06 -0400
committerFred Reitberger <reitbergerfred@gmail.com>2022-11-07 12:24:32 +0000
commit5e8e911b7caee021faff96c4e82a77a42544ea62 (patch)
tree03ccde28d83e56343b6b78f3e70cc93ba64b9544 /src/mainboard/jetway/nf81-t56n-lf/Kconfig
parent502dc54ffc9d9220d29a47ca93cec20be6c8f946 (diff)
soc/amd/common/include/gpio_defs.h: Add comment for accuracy
The GPIO debounce timebase bit 4 is only 183uS on Picasso. On the other SoCs it is 244uS. This affects the 1mS and 2mS actual debounce times slightly. Time PCO Others 1mS 0.915mS 1.220mS 2mS 2.013mS 2.684mS Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: Id84bef75e6ab134778721ca269d763a4bb2ddde5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69209 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/jetway/nf81-t56n-lf/Kconfig')
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