diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-24 00:04:22 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2018-05-31 03:42:57 +0000 |
commit | 82d7609ea942d4a8a196182f5a3c959b8c123052 (patch) | |
tree | 66db9a312702c2e0d8e651bd1a956da30b0e419c /src/mainboard/jetway/j7f2 | |
parent | d840eb5719e51e1946ab322c0eb94defc72dde1d (diff) |
Remove all VIA CN700 boards
Platforms with LATE_CBMEM_INIT were agreed to be
removed with 4.7 release late 2017.
Change-Id: I06840476ad187cbb6e6af554b5c8e8c4d66f6624
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26674
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard/jetway/j7f2')
-rw-r--r-- | src/mainboard/jetway/j7f2/Kconfig | 27 | ||||
-rw-r--r-- | src/mainboard/jetway/j7f2/Kconfig.name | 2 | ||||
-rw-r--r-- | src/mainboard/jetway/j7f2/board_info.txt | 3 | ||||
-rw-r--r-- | src/mainboard/jetway/j7f2/cmos.layout | 28 | ||||
-rw-r--r-- | src/mainboard/jetway/j7f2/devicetree.cb | 62 | ||||
-rw-r--r-- | src/mainboard/jetway/j7f2/irq_tables.c | 50 | ||||
-rw-r--r-- | src/mainboard/jetway/j7f2/romstage.c | 98 |
7 files changed, 0 insertions, 270 deletions
diff --git a/src/mainboard/jetway/j7f2/Kconfig b/src/mainboard/jetway/j7f2/Kconfig deleted file mode 100644 index 48a85a14a4..0000000000 --- a/src/mainboard/jetway/j7f2/Kconfig +++ /dev/null @@ -1,27 +0,0 @@ -if BOARD_JETWAY_J7F2 || BOARD_JETWAY_J7F4K1G2E || BOARD_JETWAY_J7F4K1G5D - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_VIA_C7 - select NORTHBRIDGE_VIA_CN700 - select SOUTHBRIDGE_VIA_VT8237R - select SUPERIO_FINTEK_F71805F - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select BOARD_ROMSIZE_KB_512 - -config MAINBOARD_DIR - string - default jetway/j7f2 - -if BOARD_JETWAY_J7F2 -config MAINBOARD_PART_NUMBER - string - default "J7f2" -endif # BOARD_JETWAY_J7F2 - -config IRQ_SLOT_COUNT - int - default 10 - -endif # BOARD_JETWAY_J7F2 || BOARD_JETWAY_J7F4K1G2E || BOARD_JETWAY_J7F4K1G5D diff --git a/src/mainboard/jetway/j7f2/Kconfig.name b/src/mainboard/jetway/j7f2/Kconfig.name deleted file mode 100644 index 0261d1642b..0000000000 --- a/src/mainboard/jetway/j7f2/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_JETWAY_J7F2 - bool "J7F2" diff --git a/src/mainboard/jetway/j7f2/board_info.txt b/src/mainboard/jetway/j7f2/board_info.txt deleted file mode 100644 index 709f95ce6d..0000000000 --- a/src/mainboard/jetway/j7f2/board_info.txt +++ /dev/null @@ -1,3 +0,0 @@ -Board URL: http://www.jetway.com.tw/jw/ipcboard_view.asp?productid=279&proname=J7F2 -Category: mini -Release year: 2008 diff --git a/src/mainboard/jetway/j7f2/cmos.layout b/src/mainboard/jetway/j7f2/cmos.layout deleted file mode 100644 index b238a379d8..0000000000 --- a/src/mainboard/jetway/j7f2/cmos.layout +++ /dev/null @@ -1,28 +0,0 @@ -entries - -0 384 r 0 reserved_memory -384 1 e 4 boot_option -388 4 h 0 reboot_counter -#392 3 r 0 unused -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -456 1 e 1 ECC_memory -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -6 5 Notice -6 6 Info -6 7 Debug -6 8 Spew - -checksums - -checksum 392 1007 1008 diff --git a/src/mainboard/jetway/j7f2/devicetree.cb b/src/mainboard/jetway/j7f2/devicetree.cb deleted file mode 100644 index ce5589f316..0000000000 --- a/src/mainboard/jetway/j7f2/devicetree.cb +++ /dev/null @@ -1,62 +0,0 @@ -chip northbridge/via/cn700 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # AGP Bridge - device pci 0.1 on end # Error Reporting - device pci 0.2 on end # Host Bus Control - device pci 0.3 on end # Memory Controller - device pci 0.4 on end # Power Management - device pci 0.7 on end # V-Link Controller - device pci 1.0 on end # PCI Bridge - chip southbridge/via/vt8237r # Southbridge - # Enable both IDE channels. - register "ide0_enable" = "1" - register "ide1_enable" = "1" - # Both cables are 40pin. - register "ide0_80pin_cable" = "0" - register "ide1_80pin_cable" = "0" - register "fn_ctrl_lo" = "0x80" - register "fn_ctrl_hi" = "0x1d" - device pci a.0 on end # Firewire - device pci f.0 on end # SATA - device pci f.1 on end # IDE - device pci 10.0 on end # OHCI - device pci 10.1 on end # OHCI - device pci 10.2 on end # OHCI - device pci 10.3 on end # OHCI - device pci 10.4 on end # EHCI - device pci 11.0 on # Southbridge LPC - chip superio/fintek/f71805f # Super I/O - device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 on # Parallel Port - io 0x60 = 0x378 - irq 0x70 = 7 - drq 0x74 = 3 - end - device pnp 2e.2 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.b on # HWM - io 0x60 = 0xec00 - end - end - end - device pci 11.5 on end # AC'97 audio - # device pci 11.6 off end # AC'97 Modem - device pci 12.0 on end # Ethernet - end - end - device cpu_cluster 0 on # APIC cluster - chip cpu/via/c7 # VIA C7 - device lapic 0 on end # APIC - end - end -end diff --git a/src/mainboard/jetway/j7f2/irq_tables.c b/src/mainboard/jetway/j7f2/irq_tables.c deleted file mode 100644 index 15263cc817..0000000000 --- a/src/mainboard/jetway/j7f2/irq_tables.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 VIA Technologies, Inc. - * (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, - PIRQ_VERSION, - 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x11 << 3) | 0x0, /* Interrupt router device */ - 0x828, /* IRQs devoted exclusively to PCI usage */ - 0x1106, /* Vendor */ - 0x596, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x3e, /* Checksum */ - { - /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00,(0x08 << 3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x1, 0x0}, - {0x00,(0x09 << 3)|0x0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0x0def8}}, 0x2, 0x0}, - {0x00,(0x0a << 3)|0x0, {{0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0x0def8}}, 0x3, 0x0}, - {0x00,(0x0b << 3)|0x0, {{0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0x0def8}}, 0x4, 0x0}, - {0x00,(0x0c << 3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x5, 0x0}, - {0x00,(0x11 << 3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x0f << 3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x01 << 3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x10 << 3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0}, - {0x00,(0x12 << 3)|0x0, {{0x01, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0}, - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/jetway/j7f2/romstage.c b/src/mainboard/jetway/j7f2/romstage.c deleted file mode 100644 index 186c768168..0000000000 --- a/src/mainboard/jetway/j7f2/romstage.c +++ /dev/null @@ -1,98 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 VIA Technologies, Inc. - * (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <console/console.h> -#include <northbridge/via/cn700/raminit.h> -#include <cpu/x86/bist.h> -#include <delay.h> -#include <southbridge/via/vt8237r/vt8237r.h> -#include <superio/fintek/common/fintek.h> -#include <superio/fintek/f71805f/f71805f.h> -#include <lib.h> -#include <spd.h> - -#if CONFIG_TTYS0_BASE == 0x2f8 -#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP2) -#else -#define SERIAL_DEV PNP_DEV(0x2e, F71805F_SP1) -#endif - -int spd_read_byte(unsigned device, unsigned address) -{ - return smbus_read_byte(device, address); -} - -static void enable_mainboard_devices(void) -{ - pci_devfn_t dev; - - dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, - PCI_DEVICE_ID_VIA_VT8237R_LPC), 0); - if (dev == PCI_DEV_INVALID) - die("Southbridge not found!!!\n"); - - /* bit=0 means enable function (per CX700 datasheet) - * 5 16.1 USB 2 - * 4 16.0 USB 1 - * 3 15.0 SATA and PATA - * 2 16.2 USB 3 - * 1 16.4 USB EHCI - */ - pci_write_config8(dev, 0x50, 0x80); - - /* bit=1 means enable internal function (per CX700 datasheet) - * 3 Internal RTC - * 2 Internal PS2 Mouse - * 1 Internal KBC Configuration - * 0 Internal Keyboard Controller - */ - pci_write_config8(dev, 0x51, 0x1d); -} - -static const struct mem_controller ctrl = { - .d0f0 = 0x0000, - .d0f2 = 0x2000, - .d0f3 = 0x3000, - .d0f4 = 0x4000, - .d0f7 = 0x7000, - .d1f0 = 0x8000, - .channel0 = { DIMM0 }, -}; - -void main(unsigned long bist) -{ - /* Enable multifunction for northbridge. */ - pci_write_config8(ctrl.d0f0, 0x4f, 0x01); - - fintek_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - - enable_smbus(); - smbus_fixup(ctrl.channel0, ARRAY_SIZE(ctrl.channel0)); - - /* Halt if there was a built-in self test failure. */ - report_bist_failure(bist); - - enable_mainboard_devices(); - - ddr_ram_setup(&ctrl); -} |