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authorAlex Mauer <hawke@hawkesnest.net>2008-09-10 20:40:46 +0000
committerStefan Reinauer <stepan@openbios.org>2008-09-10 20:40:46 +0000
commit9196dd553dcfdaefec8b4d5c94895175f796ff7b (patch)
tree42672980bec9bab5652bd9e29e0258a9dee6fe5b /src/mainboard/jetway/j7f24/irq_tables.c
parenteb2b8a282c5d08ed1a285c72931aae9e42cf565e (diff)
Add the "jetway j7f[24]*" mainboard. As compared to the Via Epia CN, this
changes the superio to a Fintek F71805F as described at http://www.coreboot.org/Jetway_J7F2_Build_Tutorial It also creates the mainboard tree for this series of motherboards (Jetway J7F2 and J7F4). I've tested it with one motherboard (J7F2WE1G3), and I believe it works with the others, as the differences among them are mostly trivial (processor speed, chipset and quantity of LAN cards, audio chipset, etc.). A list of the relevant motherboards with specs can be found at http://www.jetway.com.tw/jw/ipcboard_socket.asp?platid=16 The irq_tables.c is copied directly from the epia-cn, because the one generated by getpir with the factory BIOS did not work properly while the EPIA-CN one did. Minor changes on checkin to cope with moved romcc in latest revision. NOTE: This board is broken until the issue introduced in r3567 is resolved. Signed-off-by: Alex Mauer <hawke@hawkesnest.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway/j7f24/irq_tables.c')
-rw-r--r--src/mainboard/jetway/j7f24/irq_tables.c54
1 files changed, 54 insertions, 0 deletions
diff --git a/src/mainboard/jetway/j7f24/irq_tables.c b/src/mainboard/jetway/j7f24/irq_tables.c
new file mode 100644
index 0000000000..fef553e219
--- /dev/null
+++ b/src/mainboard/jetway/j7f24/irq_tables.c
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008 VIA Technologies, Inc.
+ * (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/pirq_routing.h>
+
+const struct irq_routing_table intel_irq_routing_table = {
+ PIRQ_SIGNATURE,
+ PIRQ_VERSION,
+ 32 + 16 * IRQ_SLOT_COUNT,/* Max. number of devices on the bus */
+ 0x00, /* Interrupt router bus */
+ (0x11 << 3) | 0x0, /* Interrupt router device */
+ 0x828, /* IRQs devoted exclusively to PCI usage */
+ 0x1106, /* Vendor */
+ 0x596, /* Device */
+ 0, /* Crap (miniport) */
+ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+ 0x3e, /* Checksum */
+ {
+ /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
+ {0x00,(0x08<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x1, 0x0},
+ {0x00,(0x09<<3)|0x0, {{0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0x0def8}}, 0x2, 0x0},
+ {0x00,(0x0a<<3)|0x0, {{0x03, 0xdef8}, {0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0x0def8}}, 0x3, 0x0},
+ {0x00,(0x0b<<3)|0x0, {{0x05, 0xdef8}, {0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0x0def8}}, 0x4, 0x0},
+ {0x00,(0x0c<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x5, 0x0},
+ {0x00,(0x11<<3)|0x0, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
+ {0x00,(0x0f<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
+ {0x00,(0x01<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
+ {0x00,(0x10<<3)|0x0, {{0x01, 0xdef8}, {0x02, 0xdef8}, {0x03, 0xdef8}, {0x05, 0x0def8}}, 0x0, 0x0},
+ {0x00,(0x12<<3)|0x0, {{0x01, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0x0def8}}, 0x0, 0x0},
+ }
+};
+
+unsigned long write_pirq_routing_table(unsigned long addr)
+{
+ return copy_pirq_routing_table(addr);
+}