diff options
| author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-01-18 23:29:55 +0100 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-01-19 00:18:05 +0100 |
| commit | 2cb9685860d634c66988c4d45b7a696e6e2b42a8 (patch) | |
| tree | 893385ca58d69bd2fb53f77471c5e8e031ae0ac8 /src/mainboard/jetway/j7f24/devicetree.cb | |
| parent | fb0710889491fc814d4d2b3a5ef0413fbc5f960d (diff) | |
jetway/j7f24: Rename to jetway/j7f2.
Original actually meant j7f[24] which without square brackets
became confusing. There is no such board as j7f24.
This is a prerequisite to adding j7f4* as cloned boards
Change-Id: Ia7708b13ac4141ef788183c7817fce1366919936
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4728
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/jetway/j7f24/devicetree.cb')
| -rw-r--r-- | src/mainboard/jetway/j7f24/devicetree.cb | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/src/mainboard/jetway/j7f24/devicetree.cb b/src/mainboard/jetway/j7f24/devicetree.cb deleted file mode 100644 index 3b99b9c3b2..0000000000 --- a/src/mainboard/jetway/j7f24/devicetree.cb +++ /dev/null @@ -1,62 +0,0 @@ -chip northbridge/via/cn700 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # AGP Bridge - device pci 0.1 on end # Error Reporting - device pci 0.2 on end # Host Bus Control - device pci 0.3 on end # Memory Controller - device pci 0.4 on end # Power Management - device pci 0.7 on end # V-Link Controller - device pci 1.0 on end # PCI Bridge - chip southbridge/via/vt8237r # Southbridge - # Enable both IDE channels. - register "ide0_enable" = "1" - register "ide1_enable" = "1" - # Both cables are 40pin. - register "ide0_80pin_cable" = "0" - register "ide1_80pin_cable" = "0" - register "fn_ctrl_lo" = "0x80" - register "fn_ctrl_hi" = "0x1d" - device pci a.0 on end # Firewire - device pci f.0 on end # SATA - device pci f.1 on end # IDE - device pci 10.0 on end # OHCI - device pci 10.1 on end # OHCI - device pci 10.2 on end # OHCI - device pci 10.3 on end # OHCI - device pci 10.4 on end # EHCI - device pci 11.0 on # Southbridge LPC - chip superio/fintek/f71805f # Super I/O - device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 on # Parallel Port - io 0x60 = 0x378 - irq 0x70 = 7 - drq 0x74 = 3 - end - device pnp 2e.2 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.b on # HWM - io 0x60 = 0xec00 - end - end - end - device pci 11.5 on end # AC'97 audio - # device pci 11.6 off end # AC'97 Modem - device pci 12.0 on end # Ethernet - end - end - device cpu_cluster 0 on # APIC cluster - chip cpu/via/c7 # VIA C7 - device lapic 0 on end # APIC - end - end -end |