diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2009-06-30 15:17:49 +0000 |
---|---|---|
committer | Stefan Reinauer <stepan@openbios.org> | 2009-06-30 15:17:49 +0000 |
commit | 0867062412dd4bfe5a556e5f3fd85ba5b682d79b (patch) | |
tree | 81ca5db12b8567b48daaa23a541bfb8a5dc011f8 /src/mainboard/jetway/j7f24/Options.lb | |
parent | 9702b6bf7ec5a4fb16934f1cf2724480e2460c89 (diff) |
This patch unifies the use of config options in v2 to all start with CONFIG_
It's basically done with the following script and some manual fixup:
VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/jetway/j7f24/Options.lb')
-rw-r--r-- | src/mainboard/jetway/j7f24/Options.lb | 106 |
1 files changed, 53 insertions, 53 deletions
diff --git a/src/mainboard/jetway/j7f24/Options.lb b/src/mainboard/jetway/j7f24/Options.lb index 1000212827..0bc79aa261 100644 --- a/src/mainboard/jetway/j7f24/Options.lb +++ b/src/mainboard/jetway/j7f24/Options.lb @@ -19,83 +19,83 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -uses HAVE_MP_TABLE +uses CONFIG_HAVE_MP_TABLE uses CONFIG_CBFS -uses HAVE_PIRQ_TABLE -uses USE_FALLBACK_IMAGE -uses HAVE_FALLBACK_BOOT -uses HAVE_HARD_RESET -uses HAVE_OPTION_TABLE -uses USE_OPTION_TABLE +uses CONFIG_HAVE_PIRQ_TABLE +uses CONFIG_USE_FALLBACK_IMAGE +uses CONFIG_HAVE_FALLBACK_BOOT +uses CONFIG_HAVE_HARD_RESET +uses CONFIG_HAVE_OPTION_TABLE +uses CONFIG_USE_OPTION_TABLE uses CONFIG_ROM_PAYLOAD -uses IRQ_SLOT_COUNT -uses MAINBOARD -uses MAINBOARD_VENDOR -uses MAINBOARD_PART_NUMBER +uses CONFIG_IRQ_SLOT_COUNT +uses CONFIG_MAINBOARD +uses CONFIG_MAINBOARD_VENDOR +uses CONFIG_MAINBOARD_PART_NUMBER uses COREBOOT_EXTRA_VERSION -uses ARCH -uses FALLBACK_SIZE -uses STACK_SIZE -uses HEAP_SIZE -uses ROM_SIZE -uses ROM_SECTION_SIZE -uses ROM_IMAGE_SIZE -uses ROM_SECTION_SIZE -uses ROM_SECTION_OFFSET +uses CONFIG_ARCH +uses CONFIG_FALLBACK_SIZE +uses CONFIG_STACK_SIZE +uses CONFIG_HEAP_SIZE +uses CONFIG_ROM_SIZE +uses CONFIG_ROM_SECTION_SIZE +uses CONFIG_ROM_IMAGE_SIZE +uses CONFIG_ROM_SECTION_SIZE +uses CONFIG_ROM_SECTION_OFFSET uses CONFIG_ROM_PAYLOAD_START uses CONFIG_COMPRESSED_PAYLOAD_NRV2B uses CONFIG_COMPRESSED_PAYLOAD_LZMA -uses PAYLOAD_SIZE -uses _ROMBASE -uses _RAMBASE -uses XIP_ROM_SIZE -uses XIP_ROM_BASE -uses HAVE_MP_TABLE -uses HAVE_ACPI_TABLES -uses HAVE_ACPI_RESUME -uses CROSS_COMPILE +uses CONFIG_PAYLOAD_SIZE +uses CONFIG_ROMBASE +uses CONFIG_RAMBASE +uses CONFIG_XIP_ROM_SIZE +uses CONFIG_XIP_ROM_BASE +uses CONFIG_HAVE_MP_TABLE +uses CONFIG_HAVE_ACPI_TABLES +uses CONFIG_HAVE_ACPI_RESUME +uses CONFIG_CROSS_COMPILE uses CC -uses HOSTCC -uses OBJCOPY -uses DEFAULT_CONSOLE_LOGLEVEL -uses MAXIMUM_CONSOLE_LOGLEVEL +uses CONFIG_HOSTCC +uses CONFIG_OBJCOPY +uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL +uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_UDELAY_TSC uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses CONFIG_PCI_ROM_RUN uses CONFIG_CONSOLE_VGA uses CONFIG_MAX_PCI_BUSES -uses TTYS0_BAUD +uses CONFIG_TTYS0_BAUD uses CONFIG_VIDEO_MB uses CONFIG_IOAPIC -default ROM_SIZE = 512 * 1024 +default CONFIG_ROM_SIZE = 512 * 1024 default CONFIG_IOAPIC = 0 default CONFIG_VIDEO_MB = 32 default CONFIG_CONSOLE_SERIAL8250 = 1 default CONFIG_PCI_ROM_RUN = 0 default CONFIG_CONSOLE_VGA = 0 -default HAVE_FALLBACK_BOOT = 1 -default HAVE_MP_TABLE = 0 +default CONFIG_HAVE_FALLBACK_BOOT = 1 +default CONFIG_HAVE_MP_TABLE = 0 default CONFIG_UDELAY_TSC = 1 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1 -default HAVE_HARD_RESET = 0 -default HAVE_PIRQ_TABLE = 1 -default IRQ_SLOT_COUNT = 10 -default HAVE_ACPI_TABLES = 0 -default HAVE_OPTION_TABLE = 0 -default ROM_IMAGE_SIZE = 64 * 1024 -default FALLBACK_SIZE = ROM_SIZE -default USE_FALLBACK_IMAGE = 1 -default STACK_SIZE = 8 * 1024 -default HEAP_SIZE = 16 * 1024 -default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE -#default USE_OPTION_TABLE = 0 -default _RAMBASE = 0x00004000 +default CONFIG_HAVE_HARD_RESET = 0 +default CONFIG_HAVE_PIRQ_TABLE = 1 +default CONFIG_IRQ_SLOT_COUNT = 10 +default CONFIG_HAVE_ACPI_TABLES = 0 +default CONFIG_HAVE_OPTION_TABLE = 0 +default CONFIG_ROM_IMAGE_SIZE = 64 * 1024 +default CONFIG_FALLBACK_SIZE = CONFIG_ROM_SIZE +default CONFIG_USE_FALLBACK_IMAGE = 1 +default CONFIG_STACK_SIZE = 8 * 1024 +default CONFIG_HEAP_SIZE = 16 * 1024 +default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE +#default CONFIG_USE_OPTION_TABLE = 0 +default CONFIG_RAMBASE = 0x00004000 default CONFIG_ROM_PAYLOAD = 1 -default CROSS_COMPILE = "" -default CC = "$(CROSS_COMPILE)gcc -m32 -fno-stack-protector" -default HOSTCC = "gcc" +default CONFIG_CROSS_COMPILE = "" +default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32 -fno-stack-protector" +default CONFIG_HOSTCC = "gcc" ## ## Set this to the max PCI bus number you would ever use for PCI config I/O. |