diff options
author | Stefan Reinauer <stepan@coresystems.de> | 2007-11-02 12:54:49 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2007-11-02 12:54:49 +0000 |
commit | 7162cf7278f1489cbe4b56a7fb95b713735387d9 (patch) | |
tree | 7ca1b3b27a16e3b7aa00584aaf93aa9a239ad97d /src/mainboard/iwill/dk8s2/Options.lb | |
parent | 894562f4eb81a83b360e3bd928a0517ae0122b4d (diff) |
fix up iwill board compilation. Untested, trivial
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2930 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iwill/dk8s2/Options.lb')
-rw-r--r-- | src/mainboard/iwill/dk8s2/Options.lb | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/src/mainboard/iwill/dk8s2/Options.lb b/src/mainboard/iwill/dk8s2/Options.lb index 74864e5381..049074f6c7 100644 --- a/src/mainboard/iwill/dk8s2/Options.lb +++ b/src/mainboard/iwill/dk8s2/Options.lb @@ -48,7 +48,9 @@ uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY - +uses USE_DCACHE_RAM +uses DCACHE_RAM_BASE +uses DCACHE_RAM_SIZE uses CONFIG_USE_INIT ## ROM_SIZE is the size of boot ROM that this board will use. @@ -111,6 +113,14 @@ default CONFIG_MAX_PHYSICAL_CPUS=2 default CONFIG_IOAPIC=1 ## +## enable CACHE_AS_RAM specifics +## +default USE_DCACHE_RAM=1 +default DCACHE_RAM_BASE=0xcf000 +default DCACHE_RAM_SIZE=0x1000 +default CONFIG_USE_INIT=0 + +## ## Clean up the motherboard id strings ## default MAINBOARD_PART_NUMBER="HDAMA" |