diff options
| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 12:32:52 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-10-09 12:32:52 +0000 |
| commit | 91ff0df62777a9ec4a399ef899803c05e7caad60 (patch) | |
| tree | 93bc6c2927195fe3e991172acb3c923d89ec6bec /src/mainboard/iwill/dk8s2/Kconfig | |
| parent | 748475b800c552236aff16c1beffd55b70791ae6 (diff) | |
More Kconfig-supported boards, and also kconfig support
for amd/socket_AM2R2, amd/socket_939, drivers/ati/ragexl
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/iwill/dk8s2/Kconfig')
| -rw-r--r-- | src/mainboard/iwill/dk8s2/Kconfig | 109 |
1 files changed, 109 insertions, 0 deletions
diff --git a/src/mainboard/iwill/dk8s2/Kconfig b/src/mainboard/iwill/dk8s2/Kconfig new file mode 100644 index 0000000000..32d2a2783a --- /dev/null +++ b/src/mainboard/iwill/dk8s2/Kconfig @@ -0,0 +1,109 @@ +config BOARD_IWILL_DK8S2 + bool "DK8S2" + select ARCH_X86 + select CPU_AMD_K8 + select CPU_AMD_SOCKET_940 + select NORTHBRIDGE_AMD_AMDK8 + select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX + select SOUTHBRIDGE_AMD_AMD8111 + select SOUTHBRIDGE_AMD_AMD8131 + select SUPERIO_WINBOND_W83627HF + select HAVE_PIRQ_TABLE + select USE_PRINTK_IN_CAR + select USE_DCACHE_RAM + select HAVE_HARD_RESET + select IOAPIC + select AP_CODE_IN_CAR + select SB_HT_CHAIN_UNITID_OFFSET_ONLY + select WAIT_BEFORE_CPUS_INIT + select ATI_RAGE_XL + +config MAINBOARD_DIR + string + default iwill/dk8s2 + depends on BOARD_IWILL_DK8S2 + +config DCACHE_RAM_BASE + hex + default 0xc8000 + depends on BOARD_IWILL_DK8S2 + +config DCACHE_RAM_SIZE + hex + default 0x08000 + depends on BOARD_IWILL_DK8S2 + +config DCACHE_RAM_GLOBAL_VAR_SIZE + hex + default 0x01000 + depends on BOARD_IWILL_DK8S2 + +config APIC_ID_OFFSET + hex + default 0x8 + depends on BOARD_IWILL_DK8S2 + +config LB_CKS_RANGE_END + int + default 122 + depends on BOARD_IWILL_DK8S2 + +config LB_CKS_LOC + int + default 123 + depends on BOARD_IWILL_DK8S2 + +config MAINBOARD_PART_NUMBER + string + default "DK8S2" + depends on BOARD_IWILL_DK8S2 + +config HW_MEM_HOLE_SIZEK + hex + default 0x100000 + depends on BOARD_IWILL_DK8S2 + +config MAX_CPUS + int + default 4 + depends on BOARD_IWILL_DK8S2 + +config MAX_PHYSICAL_CPUS + int + default 2 + depends on BOARD_IWILL_DK8S2 + +config HW_MEM_HOLE_SIZE_AUTO_INC + bool + default n + depends on BOARD_IWILL_DK8S2 + +config SB_HT_CHAIN_ON_BUS0 + int + default 2 + depends on BOARD_IWILL_DK8S2 + +config HT_CHAIN_END_UNITID_BASE + hex + default 0x6 + depends on BOARD_IWILL_DK8S2 + +config HT_CHAIN_UNITID_BASE + hex + default 0xa + depends on BOARD_IWILL_DK8S2 + +config USE_INIT + bool + default n + depends on BOARD_IWILL_DK8S2 + +config SERIAL_CPU_INIT + bool + default n + depends on BOARD_IWILL_DK8S2 + +config IRQ_SLOT_COUNT + int + default 11 + depends on BOARD_IWILL_DK8S2 |