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authordavid <david_wu@quantatw.com>2015-12-23 20:12:06 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-01-19 16:19:02 +0100
commit425a4669485423d9a3de781f5c97765b9860a971 (patch)
tree5c367ea843092b55749a9784b58d013bc3e2a72c /src/mainboard/iwave
parentd5fd2dddde538362c965ddab5c17a3404317694c (diff)
google/lars: SPD changes for EVT board
Update Memory IDs for EVT board BUG=None BRANCH=lars TEST=Build and boot lars Change-Id: I8c0c731fc3a8eec0cb558137e9db90170debf2c6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a95fbf063b2e41d551171228a1ea8cbcfdcaecc8 Original-Change-Id: I2be8a7db99f17ea2968d7e4c5de83cc3e4cbcd14 Original-Signed-off-by: David Wu <David_Wu@quantatw.com> Original-Reviewed-on: https://chromium-review.googlesource.com/319622 Original-Commit-Ready: David Wu <david_wu@quantatw.com> Original-Tested-by: David Wu <david_wu@quantatw.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12996 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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