diff options
| author | Martin Roth <gaumless@gmail.com> | 2017-10-15 14:20:28 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-01-15 23:23:30 +0000 |
| commit | 0026a53562595cafb466e4ff836c50a7817d5297 (patch) | |
| tree | 4d5f4062df24cdaa0109e9bddac81c587ea36d0e /src/mainboard/iwave/iWRainbowG6/dsdt.asl | |
| parent | 732fb2ab5363968a12b2270319189c2a2a536a36 (diff) | |
Intel sch board & chip: Remove - using LATE_CBMEM_INIT
All boards and chips that are still using LATE_CBMEM_INIT are being
removed as previously discussed.
If these boards and chips are updated to not use LATE_CBMEM_INIT, they
can be restored to the active codebase from the 4.7 branch.
chips:
soc/intel/sch
Mainboards:
mainboard/iwave/iWRainbowG6
Change-Id: Ida0570988a23fd0d13c6fcbe54f94ab0668c9eae
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/22027
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/iwave/iWRainbowG6/dsdt.asl')
| -rw-r--r-- | src/mainboard/iwave/iWRainbowG6/dsdt.asl | 45 |
1 files changed, 0 insertions, 45 deletions
diff --git a/src/mainboard/iwave/iWRainbowG6/dsdt.asl b/src/mainboard/iwave/iWRainbowG6/dsdt.asl deleted file mode 100644 index 0dc46f2caa..0000000000 --- a/src/mainboard/iwave/iWRainbowG6/dsdt.asl +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -DefinitionBlock( - "dsdt.aml", - "DSDT", - 0x02, // DSDT revision: ACPI v2.0 - "COREv4", // OEM id - "COREBOOT", // OEM table id - 0x20090419 // OEM revision -) -{ - // Some generic macros - #include "acpi/platform.asl" - - // global NVS and variables - #include <soc/intel/sch/acpi/globalnvs.asl> - - // General Purpose Events - //#include "acpi/gpe.asl" - - //#include "acpi/thermal.asl" - - Scope (\_SB) { - Device (PCI0) - { - #include <soc/intel/sch/acpi/sch.asl> - } - } - - /* Chipset specific sleep states */ - #include <soc/intel/sch/acpi/sleepstates.asl> -} |