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authorArthur Heymans <arthur@aheymans.xyz>2019-11-12 16:17:26 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 07:06:13 +0000
commitdc2e7c6e0fb1331a7808c226992c71e07f9ca7bd (patch)
treef1bde11a320b587f99bc3a62e654ab1be346ea24 /src/mainboard/intel
parent05d7d82d37ae04ec4cf3579eb1c0f7bf0c0b7aa2 (diff)
nb/intel/sandybridge: Make the mainboard_early_init hook optional
This adds an empty weakly linked default. The rationale behind this change is that without the callback some features might not work but that the result is likely still able to boot, so it can be made optional. Change-Id: I62c8010aa81fc45d208e9293feb2f45b45f34a82 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36780 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/dcp847ske/early_southbridge.c4
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c4
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index 984629574c..7f3a58d0f2 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -52,10 +52,6 @@ void mainboard_rcba_config(void)
MCHBAR32(0x0104) |= 0x00001000;
}
-void mainboard_early_init(int s3resume)
-{
-}
-
static const u16 hwm_initvals[] = {
HWM_BANK(0),
HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index d56576e2e5..e7959ef32f 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -153,10 +153,6 @@ void mainboard_get_spd(spd_raw_data *spd, bool id_only)
read_spd(&spd[2], 0x52, id_only);
}
-void mainboard_early_init(int s3resume)
-{
-}
-
int mainboard_should_reset_usb(int s3resume)
{
return !s3resume;