diff options
| author | V Sowmya <v.sowmya@intel.com> | 2021-05-19 09:43:34 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-06 19:13:06 +0000 |
| commit | ce710ccb4728d7635f44fd97c1c43c40dcc2c912 (patch) | |
| tree | ef7a6f3bd02812e1ca58a4979dffe1f71ca81769 /src/mainboard/intel | |
| parent | e3a21bb749fac781d6f3c46b52fb83b9d5c90e5e (diff) | |
mb/intel/shadowmountain: Enable SaGv support
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I15203920546363466eef567136821b59dda763b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54648
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb index de3b4dfb6f..6cf83d2707 100644 --- a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb @@ -22,9 +22,8 @@ chip soc/intel/alderlake # Enable CNVi Bluetooth register "CnviBtCore" = "true" - # FSP configuration - register "SaGv" = "SaGv_Disabled" + register "SaGv" = "SaGv_Enabled" # S0ix enable register "s0ix_enable" = "1" |