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authorPhilipp Deppenwiese <zaolin@das-labor.org>2018-02-27 19:40:52 +0100
committerMartin Roth <martinroth@google.com>2018-06-04 20:33:07 +0000
commitc07f8fbe6fd13e4245da71574b52b47e9733db84 (patch)
tree12db8b3c40552eab81045c6165538e2d3ba36ce8 /src/mainboard/intel
parent961d31bdb3c97e177156ed335d6f2c726d08ab51 (diff)
security/tpm: Unify the coreboot TPM software stack
* Remove 2nd software stack in pc80 drivers directory. * Create TSPI interface for common usage. * Refactor TSS / TIS code base. * Add vendor tss (Cr50) directory. * Change kconfig options for TPM to TPM1. * Add user / board configuration with: * MAINBOARD_HAS_*_TPM # * BUS driver * MAINBOARD_HAS_TPM1 or MAINBOARD_HAS_TPM2 * Add kconfig TPM user selection (e.g. pluggable TPMs) * Fix existing headers and function calls. * Fix vboot for interface usage and antirollback mode. Change-Id: I7ec277e82a3c20c62a0548a1a2b013e6ce8f5b3f Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: https://review.coreboot.org/24903 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c2
-rw-r--r--src/mainboard/intel/galileo/Kconfig4
-rw-r--r--src/mainboard/intel/glkrvp/Kconfig1
-rw-r--r--src/mainboard/intel/kblrvp/Kconfig24
4 files changed, 4 insertions, 27 deletions
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index 24c4b564c2..d23541fa7f 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -36,7 +36,7 @@
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <halt.h>
-#include <security/tpm/tis.h>
+#include <security/tpm/tspi.h>
#define SIO_PORT 0x164e
diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig
index edea30f30f..87f82bc6bc 100644
--- a/src/mainboard/intel/galileo/Kconfig
+++ b/src/mainboard/intel/galileo/Kconfig
@@ -22,6 +22,8 @@ config BOARD_SPECIFIC_OPTIONS
select ENABLE_BUILTIN_HSUART1
select HAVE_ACPI_TABLES
select SOC_INTEL_QUARK
+ select MAINBOARD_HAS_I2C_TPM_ATMEL
+ select MAINBOARD_HAS_TPM2
config MAINBOARD_DIR
string
@@ -152,8 +154,6 @@ config VBOOT_WITH_CRYPTO_SHIELD
bool "Verified boot using the Crypto Shield board"
default n
select COLLECT_TIMESTAMPS
- select I2C_TPM
- select MAINBOARD_HAS_I2C_TPM_ATMEL
select VBOOT_SEPARATE_VERSTAGE
select VBOOT
select VBOOT_STARTS_IN_BOOTBLOCK
diff --git a/src/mainboard/intel/glkrvp/Kconfig b/src/mainboard/intel/glkrvp/Kconfig
index 3451640d27..eb6d595fcc 100644
--- a/src/mainboard/intel/glkrvp/Kconfig
+++ b/src/mainboard/intel/glkrvp/Kconfig
@@ -10,7 +10,6 @@ config BOARD_INTEL_BASEBOARD_GLKRVP
select HAVE_ACPI_TABLES
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_LPC_TPM
- select MAINBOARD_HAS_TPM2
select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_DA7219
select SOC_ESPI
diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig
index bbeb12987e..aed8297b97 100644
--- a/src/mainboard/intel/kblrvp/Kconfig
+++ b/src/mainboard/intel/kblrvp/Kconfig
@@ -14,33 +14,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_USES_FSP2_0
select MAINBOARD_HAS_CHROMEOS
select GENERIC_SPD_BIN
+ select MAINBOARD_HAS_LPC_TPM
config VBOOT
select VBOOT_LID_SWITCH
-choice
- prompt "TPM to USE"
- default KBLRVP_TPM1_2
- help
- This option allows you to select the TPM to use.
- Select whether the board does not have TPM, TPM 1.1 or TPM 2.0
-
-config KBLRVP_NO_TPM
- bool "No TPM"
- select VBOOT_MOCK_SECDATA if VBOOT
-
-config KBLRVP_TPM1_2
- bool "TPM 1.1"
- select MAINBOARD_HAS_LPC_TPM
-
-config KBLRVP_TPM2_0
- bool "TPM 2.0"
- select TPM2
- select MAINBOARD_HAS_TPM2
- select MAINBOARD_HAS_LPC_TPM
-
-endchoice
-
config IRQ_SLOT_COUNT
int
default 18