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authorSridhar Siricilla <sridhar.siricilla@intel.com>2021-01-28 15:53:45 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-04-16 06:43:04 +0000
commitba0ab9f1f52f64906beaa6ebf079864b07f6f43e (patch)
tree1937164bee1ce55747298b95c72cd33fd1dfb04c /src/mainboard/intel
parent5c633dc912fb3dcc5aa87d9611109e14155b49da (diff)
mb/intel/adlrvp: Enable ALC711 over SNDW0
The patch enables ALC711 over SNDW0. Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I43891b94728c8f2d644e14da11946fea3e4515aa Reviewed-on: https://review.coreboot.org/c/coreboot/+/50022 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/adlrvp/gpio_m.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/gpio_m.c b/src/mainboard/intel/adlrvp/gpio_m.c
index 37908473d9..0cce828dd5 100644
--- a/src/mainboard/intel/adlrvp/gpio_m.c
+++ b/src/mainboard/intel/adlrvp/gpio_m.c
@@ -74,6 +74,33 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_D4, NONE, DEEP, NF1),
/* IMGCLKOUT1 */
PAD_CFG_NF(GPP_H20, NONE, DEEP, NF1),
+
+ /* C16 : I2C0 SDA */
+ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
+
+ /* S0 : SNDW1_CLK */
+ PAD_CFG_NF(GPP_S0, NONE, DEEP, NF1),
+
+ /* S1 : SNDW1_DATA */
+ PAD_CFG_NF(GPP_S1, NONE, DEEP, NF1),
+
+ /* S2 : SNDW2_CLK */
+ PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2),
+
+ /* S3 : SNDW2_DATA */
+ PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2),
+
+ /* S4 : SNDW3_CLK */
+ PAD_CFG_NF(GPP_S4, NONE, DEEP, NF2),
+
+ /* S5 : SNDW3_DATA */
+ PAD_CFG_NF(GPP_S5, NONE, DEEP, NF2),
+
+ /* S6 : SNDW4_CLK */
+ PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2),
+
+ /* S7 : SNDW4_DATA */
+ PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2)
};
void variant_configure_gpio_pads(void)