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authorPandya, Varshit B <varshit.b.pandya@intel.com>2020-08-12 21:09:02 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-08-17 07:09:27 +0000
commitb6feee0c748e4729e9f0475c37b29520aea66ef0 (patch)
tree5e813b9638cd391bfa2897cebef57ff800ad1759 /src/mainboard/intel
parent30201d4ab3ea615a6492a3292007527a77318dca (diff)
mb/intel/jasperlake_rvp: Configure GPIOs related to UFC
This change configures user facing camera related GPIOs as per schematics. 1. GPP_D5 pwr_en 2. GPP_B14 reset 3. GPP_E0 clock 4. GPP_D12 I2C4b 5. GPP_D13 I2C4b Signed-off-by: Pandya, Varshit B <varshit.b.pandya@intel.com> Change-Id: I026c16f73cf597614efaea3e0f0ab1e2cfe1e211 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44416 Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
index d67f4a44e4..21e25ab896 100644
--- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
+++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/gpio.c
@@ -31,6 +31,9 @@ static const struct pad_config gpio_table[] = {
/* PMC_PLT_RST_N */
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
+ /* CAM1_RST_N */
+ PAD_CFG_GPO(GPP_B14, 0, PLTRST),
+
/* M.2_WLAN_PERST_N */
PAD_CFG_GPO(GPP_B17, 1, PLTRST),
@@ -76,9 +79,18 @@ static const struct pad_config gpio_table[] = {
/* CAM2_PWREN */
PAD_CFG_GPO(GPP_D4, 0, PLTRST),
+ /* CAM1_PWREN */
+ PAD_CFG_GPO(GPP_D5, 0, PLTRST),
+
/*LAN_RST_N*/
PAD_CFG_GPO(GPP_D6, 1, PLTRST),
+ /* I2C4B_SDA */
+ PAD_CFG_NF(GPP_D12, NONE, DEEP, NF3),
+
+ /* I2C4B_SCL */
+ PAD_CFG_NF(GPP_D13, NONE, DEEP, NF3),
+
/* AVS_I2S_MCLK */
PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
@@ -97,6 +109,9 @@ static const struct pad_config gpio_table[] = {
/* I2C5_SCL */
PAD_CFG_NF(GPP_D23, NONE, PLTRST, NF1),
+ /* IMGCLKOUT_0 */
+ PAD_CFG_NF(GPP_E0, NONE, DEEP, NF2),
+
/* IMGCLKOUT_1 */
PAD_CFG_NF(GPP_E2, NONE, PLTRST, NF1),