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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-01-05 15:39:16 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-05-09 18:08:45 +0000
commit83faa5d804d183a26b0fa66b5d55bbe5f3b72c89 (patch)
tree9818e9b83a6e24884516182f20380850039bef86 /src/mainboard/intel
parent923b8ec18085d9b03162a1aae8dfd3aeff2d4fa0 (diff)
mb/google,intel: Use common ChromeEC code for lid shutdown
Change-Id: I4d34e5c094440dad4a6ab9adc67d3da6b71ac2bf Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74514 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/strago/smihandler.c33
1 files changed, 2 insertions, 31 deletions
diff --git a/src/mainboard/intel/strago/smihandler.c b/src/mainboard/intel/strago/smihandler.c
index f8f7c57c48..a625b62a6a 100644
--- a/src/mainboard/intel/strago/smihandler.c
+++ b/src/mainboard/intel/strago/smihandler.c
@@ -1,14 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
-#include <arch/io.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include "ec.h"
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/smm.h>
-#include <elog.h>
#include <soc/nvs.h>
#include <soc/pm.h>
@@ -19,41 +17,14 @@
/* The wake gpio is SUS_GPIO[0]. */
#define WAKE_GPIO_EN SUS_GPIO_EN0
-static uint8_t mainboard_smi_ec(void)
-{
- uint8_t cmd = google_chromeec_get_event();
- uint16_t pmbase = get_pmbase();
- uint32_t pm1_cnt;
-
- /* Log this event */
- if (cmd)
- elog_gsmi_add_event_byte(ELOG_TYPE_EC_EVENT, cmd);
-
- switch (cmd) {
- case EC_HOST_EVENT_LID_CLOSED:
- printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
-
- /* Go to S5 */
- pm1_cnt = inl(pmbase + PM1_CNT);
- pm1_cnt |= SLP_EN | (SLP_TYP_S5 << SLP_TYP_SHIFT);
- outl(pm1_cnt, pmbase + PM1_CNT);
- break;
- }
-
- return cmd;
-}
-
/*
* The entire 32-bit ALT_GPIO_SMI register is passed as a parameter. Note, that
* this includes the enable bits in the lower 16 bits.
*/
void mainboard_smi_gpi(uint32_t alt_gpio_smi)
{
- if (alt_gpio_smi & (1 << EC_SMI_GPI)) {
- /* Process all pending events */
- while (mainboard_smi_ec() != 0)
- ;
- }
+ if (alt_gpio_smi & (1 << EC_SMI_GPI))
+ chromeec_smi_process_events();
}
void mainboard_smi_sleep(uint8_t slp_typ)