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authorUsha P <usha.p@intel.com>2021-04-16 16:19:37 +0530
committerPatrick Georgi <pgeorgi@google.com>2021-05-05 11:44:44 +0000
commit24f7d2e80f51b68534b3785dbd5420f2dd0f1f38 (patch)
tree890fa105b177d09083a8764dab83056133ce83c2 /src/mainboard/intel
parent1aa5194584df9385f822bbd7fcb7833a6116b84c (diff)
mb/intel/shadowmountain: Enable early EC Software Sync
BUG=None TEST=Build and boot to OS on shadowmountain. Ensure that the EC Software Sync is complete. Signed-off-by: Usha P <usha.p@intel.com> Change-Id: I8648db685d9c63ed1f2b3e599ca951d6648b7baf Reviewed-on: https://review.coreboot.org/c/coreboot/+/52416 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Balaji Manigandan <balaji.manigandan@intel.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/shadowmountain/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/shadowmountain/Kconfig b/src/mainboard/intel/shadowmountain/Kconfig
index e42160fd1a..94a279f37b 100644
--- a/src/mainboard/intel/shadowmountain/Kconfig
+++ b/src/mainboard/intel/shadowmountain/Kconfig
@@ -31,12 +31,12 @@ config CHROMEOS
select GBB_FLAG_FORCE_DEV_BOOT_USB
select GBB_FLAG_FORCE_DEV_BOOT_ALTFW
select GBB_FLAG_FORCE_MANUAL_RECOVERY
- select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES
select VBOOT_LID_SWITCH
select HAS_RECOVERY_MRC_CACHE
+ select VBOOT_EARLY_EC_SYNC
config DIMM_SPD_SIZE
int