diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2021-06-23 15:27:43 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-06-24 07:55:12 +0000 |
| commit | 0007fa96a1a720fa1938259135d6a864452198f4 (patch) | |
| tree | 56b1cea7375963053235aa8904add817c659eccf /src/mainboard/intel | |
| parent | b03cadf84b6da713553c0b7191134f2bc63b3e11 (diff) | |
soc/intel/alderlake: Update mainboard_memory_init_params() argument
This patch updates mainboard_memory_init_params() function argument from
FSPM_UPD to FSP_M_CONFIG. Ideally mainboard_memory_init_params()
function don't need to override anything other than FSP_M_CONFIG UPDs
hence passing config block alone rather passing entire FSP-M UPD
structure.
Change-Id: I238870478a1427918abf888d71ba9c9fa80d3427
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55785
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/adlrvp/romstage_fsp_params.c | 6 | ||||
| -rw-r--r-- | src/mainboard/intel/shadowmountain/romstage.c | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c index 9fff25723e..cccd258595 100644 --- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c +++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c @@ -24,7 +24,7 @@ static size_t get_spd_index(void) return spd_index; } -void mainboard_memory_init_params(FSPM_UPD *mupd) +void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) { const struct mb_cfg *mem_config = variant_memory_params(); int board_id = get_board_id(); @@ -54,7 +54,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) case ADL_P_DDR4_2: case ADL_P_DDR5_1: case ADL_P_DDR5_2: - memcfg_init(&mupd->FspmConfig, mem_config, &ddr4_ddr5_spd_info, half_populated); + memcfg_init(m_cfg, mem_config, &ddr4_ddr5_spd_info, half_populated); break; case ADL_P_LP4_1: case ADL_P_LP4_2: @@ -62,7 +62,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) case ADL_P_LP5_2: case ADL_M_LP4: case ADL_M_LP5: - memcfg_init(&mupd->FspmConfig, mem_config, &lp4_lp5_spd_info, half_populated); + memcfg_init(m_cfg, mem_config, &lp4_lp5_spd_info, half_populated); break; default: die("Unknown board id = 0x%x\n", board_id); diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c index 1e29e8029d..3aacf38a03 100644 --- a/src/mainboard/intel/shadowmountain/romstage.c +++ b/src/mainboard/intel/shadowmountain/romstage.c @@ -9,7 +9,7 @@ #include <baseboard/variants.h> #include <cbfs.h> -void mainboard_memory_init_params(FSPM_UPD *mupd) +void mainboard_memory_init_params(FSP_M_CONFIG *m_cfg) { const struct mb_cfg *mem_config = variant_memory_params(); const bool half_populated = false; @@ -19,5 +19,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) .cbfs_index = variant_memory_sku(), }; - memcfg_init(&mupd->FspmConfig, mem_config, &lp5_spd_info, half_populated); + memcfg_init(m_cfg, mem_config, &lp5_spd_info, half_populated); } |