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authorRizwan Qureshi <rizwan.qureshi@intel.com>2015-11-19 16:01:54 +0530
committerPatrick Georgi <pgeorgi@google.com>2016-01-15 20:40:14 +0100
commite64f794f3a71408e0e89b528a41a23ffcb5f3ebe (patch)
treed8279c374a5a8b3669c2e709ebd302de8c2944d9 /src/mainboard/intel
parentb57772d2bf117e81b9e3cbb9d08ffbfae581ba69 (diff)
intel/skylake: More UPD params are added for PCH policy in FSP
Some more PCH Policy UPD Parameters are added in FSP. Lockdown config moved from FSP to coreboot. Removing settings in devicetree.cb which are zero. BRANCH=none BUG=none TEST=Build and booted on kunimitsu, verified that CB is doing the Lockdowns which were previously done by FSP. CQ-DEPEND=CL:*237842, CL:310191 Change-Id: I3dcf3a5340f3c5ef2fece2de5390cde48db4d327 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e8bdb35897b640d271adcaed266030367f060553 Original-Change-Id: Ia201672565c07b2e03d972b2718512cd4fcbb95c Original-Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Original-Signed-off-by: Naresh G Solanki <Naresh.Solanki@intel.com> Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/310869 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/12941 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
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