diff options
author | Martin Roth <martinroth@google.com> | 2015-12-06 12:14:42 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2015-12-09 16:18:14 +0100 |
commit | 9ed54f99c7e86b49cc4d3207a98d56be994cda23 (patch) | |
tree | cbd1565345f99a40643b30942c8fc88de6807277 /src/mainboard/intel | |
parent | 0a105cd0671b4f41bb8253ef1b819fb21795889a (diff) |
mohonpeak/Kconfig: Fix whitespace issues
Auto-indent did me wrong, and I didn't notice it.
Change-Id: I5a736cf53a3bdbe57b28b2d6a55befd341d8dfd8
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12655
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/mohonpeak/Kconfig | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/mohonpeak/Kconfig b/src/mainboard/intel/mohonpeak/Kconfig index 8f6e0773dc..3916fa37c1 100644 --- a/src/mainboard/intel/mohonpeak/Kconfig +++ b/src/mainboard/intel/mohonpeak/Kconfig @@ -71,10 +71,10 @@ config UART_FOR_CONSOLE help The Mohon Peak board uses COM2 (2f8) for the serial console. - config PAYLOAD_CONFIGFILE - string - default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios" - help +config PAYLOAD_CONFIGFILE + string + default "$(top)/src/mainboard/$(MAINBOARDDIR)/config_seabios" + help The Avoton/Rangeley chip does not allow devices to write into the 0xe000 segment. This means that USB/SATA devices will not work in SeaBIOS unless we put the SeaBIOS buffer area down in the 0x9000 segment. |