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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-02 10:17:10 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-15 10:25:23 +0100
commit633f6e36fa49964258ce37265deda626cec79ca9 (patch)
treecc1bed00f57692cb89b10df2a6c034706f697b89 /src/mainboard/intel
parent84437989991ac29e0957625f6333c4b857a4ad45 (diff)
mainboard/*/debug.c: Remove duplicate or dead code
We already have these implemented in 'lib/debug.c'. Will fix '.c' includes in follow ups. Change-Id: I1586d8864db7f93515214ef9a4458ebc618bf61c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7316 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/eagleheights/debug.c66
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c2
-rw-r--r--src/mainboard/intel/jarrell/debug.c66
-rw-r--r--src/mainboard/intel/jarrell/romstage.c2
-rw-r--r--src/mainboard/intel/truxton/romstage.c1
5 files changed, 3 insertions, 134 deletions
diff --git a/src/mainboard/intel/eagleheights/debug.c b/src/mainboard/intel/eagleheights/debug.c
index e5795b6532..d2c3d586f3 100644
--- a/src/mainboard/intel/eagleheights/debug.c
+++ b/src/mainboard/intel/eagleheights/debug.c
@@ -131,55 +131,6 @@ static inline void siodump(void)
return;
}
-static void print_debug_pci_dev(unsigned dev)
-{
- print_debug("PCI: ");
- print_debug_hex8((dev >> 16) & 0xff);
- print_debug_char(':');
- print_debug_hex8((dev >> 11) & 0x1f);
- print_debug_char('.');
- print_debug_hex8((dev >> 8) & 7);
-}
-
-static inline void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- print_debug_pci_dev(dev);
- print_debug("\n");
- }
-}
-
-static inline void dump_pci_device(unsigned dev)
-{
- int i;
- print_debug_pci_dev(dev);
- print_debug("\n");
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
- print_debug_char(' ');
- print_debug_hex8(val);
- if ((i & 0x0f) == 0x0f) {
- print_debug("\n");
- }
- }
-}
-
static inline void dump_bar14(unsigned dev)
{
int i;
@@ -208,23 +159,6 @@ static inline void dump_bar14(unsigned dev)
print_debug("\n");
}
-static inline void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
static inline void dump_spd_registers(void)
{
unsigned device;
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index e35140bfad..c03c7d7301 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -37,6 +37,7 @@
#include <superio/smsc/smscsuperio/smscsuperio.h>
#include "northbridge/intel/i3100/i3100.h"
#include "southbridge/intel/i3100/i3100.h"
+#include "lib/debug.c" // XXX
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0)
#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
@@ -71,7 +72,6 @@ static inline int spd_read_byte(u16 device, u8 address)
#include "northbridge/intel/i3100/raminit.c"
#include "lib/generic_sdram.c"
#include "northbridge/intel/i3100/reset_test.c"
-#include "debug.c"
#include <spd.h>
#define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
diff --git a/src/mainboard/intel/jarrell/debug.c b/src/mainboard/intel/jarrell/debug.c
index 93199d7b8a..b92a75d76c 100644
--- a/src/mainboard/intel/jarrell/debug.c
+++ b/src/mainboard/intel/jarrell/debug.c
@@ -109,55 +109,6 @@ static void siodump(void)
return;
}
-static void print_debug_pci_dev(unsigned dev)
-{
- print_debug("PCI: ");
- print_debug_hex8((dev >> 16) & 0xff);
- print_debug_char(':');
- print_debug_hex8((dev >> 11) & 0x1f);
- print_debug_char('.');
- print_debug_hex8((dev >> 8) & 7);
-}
-
-static void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- print_debug_pci_dev(dev);
- print_debug("\n");
- }
-}
-
-static void dump_pci_device(unsigned dev)
-{
- int i;
- print_debug_pci_dev(dev);
- print_debug("\n");
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
- print_debug_char(' ');
- print_debug_hex8(val);
- if ((i & 0x0f) == 0x0f) {
- print_debug("\n");
- }
- }
-}
-
static void dump_bar14(unsigned dev)
{
int i;
@@ -186,23 +137,6 @@ static void dump_bar14(unsigned dev)
print_debug("\n");
}
-static void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
#if 0
static void dump_spd_registers(const struct mem_controller *ctrl)
{
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index f1cf4c3e1f..fb4d4834f9 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -18,6 +18,7 @@
#include "northbridge/intel/e7520/memory_initialized.c"
#include "cpu/x86/bist.h"
#include <spd.h>
+#include "lib/debug.c" // XXX
#define SIO_GPIO_BASE 0x680
#define SIO_XBUS_BASE 0x4880
@@ -35,7 +36,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "northbridge/intel/e7520/raminit.c"
#include "lib/generic_sdram.c"
-#include "debug.c"
#include "arch/x86/lib/stages.c"
#include <cpu/intel/romstage.h>
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index cd4996758d..960cccb8d6 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -34,6 +34,7 @@
#include "cpu/x86/lapic/boot_cpu.c"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "superio/intel/i3100/early_serial.c"
+#include "lib/debug.c" // XXX
#include "cpu/x86/bist.h"
#include <spd.h>