diff options
| author | Patrick Georgi <patrick.georgi@secunet.com> | 2012-07-26 11:34:57 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-07-26 19:02:59 +0200 |
| commit | fce22e80d84f68b0421405e048d3f2f7c67025f3 (patch) | |
| tree | daa62cb64842a3341ff9327d581b9dfc460e5d9b /src/mainboard/intel | |
| parent | 82704c63b98202fe2a24032697369cd190202d3f (diff) | |
Remove copies of rtl8168.c
One copy was slightly different, but all the differences were commented out
Change-Id: I3cc7b5621c681a1eb286f9b16ef3ebdce03abb6b
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1356
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/d945gclf/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/d945gclf/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/mainboard/intel/d945gclf/rtl8168.c | 49 |
3 files changed, 1 insertions, 51 deletions
diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig index 32da3878c4..57078da639 100644 --- a/src/mainboard/intel/d945gclf/Kconfig +++ b/src/mainboard/intel/d945gclf/Kconfig @@ -41,6 +41,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_512 select GFXUMA select CHANNEL_XOR_RANDOMIZATION + select RTL8168_ROM_DISABLE config MAINBOARD_DIR string diff --git a/src/mainboard/intel/d945gclf/Makefile.inc b/src/mainboard/intel/d945gclf/Makefile.inc index eb0139931f..e0dd8ed0f8 100644 --- a/src/mainboard/intel/d945gclf/Makefile.inc +++ b/src/mainboard/intel/d945gclf/Makefile.inc @@ -17,6 +17,4 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -driver-y += rtl8168.c - smm-$(CONFIG_HAVE_SMI_HANDLER) += mainboard_smi.c diff --git a/src/mainboard/intel/d945gclf/rtl8168.c b/src/mainboard/intel/d945gclf/rtl8168.c deleted file mode 100644 index 04fd56ccb1..0000000000 --- a/src/mainboard/intel/d945gclf/rtl8168.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* This code should work for all ICH* southbridges with a NIC. */ - -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> - -static void nic_init(struct device *dev) -{ - printk(BIOS_DEBUG, "Initializing RTL8168 Gigabit Ethernet\n"); - // Nothing to do yet, but this has to be here to keep - // coreboot from trying to execute an option ROM. -} - -static struct device_operations nic_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = nic_init, - .scan_bus = 0, -}; - -static const struct pci_driver rtl8169_nic __pci_driver = { - .ops = &nic_ops, - .vendor = 0x10ec, - .device = 0x8168, -}; - - |