diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-07-12 18:18:23 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2021-10-19 18:55:12 +0000 |
| commit | e07f9ccc11af137ec3c95de2eef29e493be7bbac (patch) | |
| tree | 9e103488d09657069a2f5474c691b23488168bb4 /src/mainboard/intel | |
| parent | e4047354ec69d09cbff7cbe8d515bad39f9864ed (diff) | |
mb/intel/kblrvp: Rework Kconfig
Rework Kconfig file that each variant has its own config option with
their specific selects / configuration and move common selects to
`BOARD_INTEL_KBLRVP_COMMON`, which is used as base for each
variant.
Built each variant with `BUILD_TIMELESS=1` and all generated
coreboot.rom files remain identical. Excluded the .config file by
disabling `INCLUDE_CONFIG_FILE` to make this reproducible.
Change-Id: I2a9c12a15c098fcb64c006a707c94a1aed93d73a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56219
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/kblrvp/Kconfig | 36 | ||||
| -rw-r--r-- | src/mainboard/intel/kblrvp/Kconfig.name | 3 |
2 files changed, 28 insertions, 11 deletions
diff --git a/src/mainboard/intel/kblrvp/Kconfig b/src/mainboard/intel/kblrvp/Kconfig index 51f46ba1df..2abf8329f6 100644 --- a/src/mainboard/intel/kblrvp/Kconfig +++ b/src/mainboard/intel/kblrvp/Kconfig @@ -1,21 +1,35 @@ -if BOARD_INTEL_KBLRVP3 || BOARD_INTEL_KBLRVP7 || BOARD_INTEL_KBLRVP8 \ - || BOARD_INTEL_KBLRVP11 - -config BOARD_SPECIFIC_OPTIONS - def_bool y +config BOARD_INTEL_KBLRVP_COMMON + def_bool n select BOARD_ROMSIZE_KB_16384 select EC_ACPI select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE - select SOC_INTEL_COMMON_BLOCK_HDA_VERB if !BOARD_INTEL_KBLRVP8 - select SOC_INTEL_KABYLAKE - select SKYLAKE_SOC_PCH_H if BOARD_INTEL_KBLRVP8 || BOARD_INTEL_KBLRVP11 - select MAINBOARD_HAS_CHROMEOS select HAVE_SPD_IN_CBFS - select MAINBOARD_HAS_LPC_TPM select INTEL_LPSS_UART_FOR_CONSOLE - select MAINBOARD_USES_IFD_GBE_REGION if BOARD_INTEL_KBLRVP8 + select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_HAS_LPC_TPM + select SOC_INTEL_KABYLAKE + +config BOARD_INTEL_KBLRVP3 + select BOARD_INTEL_KBLRVP_COMMON + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + +config BOARD_INTEL_KBLRVP7 + select BOARD_INTEL_KBLRVP_COMMON + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + +config BOARD_INTEL_KBLRVP8 + select BOARD_INTEL_KBLRVP_COMMON + select MAINBOARD_USES_IFD_GBE_REGION + select SKYLAKE_SOC_PCH_H + +config BOARD_INTEL_KBLRVP11 + select BOARD_INTEL_KBLRVP_COMMON + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + select SKYLAKE_SOC_PCH_H + +if BOARD_INTEL_KBLRVP_COMMON config VBOOT select VBOOT_LID_SWITCH diff --git a/src/mainboard/intel/kblrvp/Kconfig.name b/src/mainboard/intel/kblrvp/Kconfig.name index df65e32318..f9cc33d637 100644 --- a/src/mainboard/intel/kblrvp/Kconfig.name +++ b/src/mainboard/intel/kblrvp/Kconfig.name @@ -1,8 +1,11 @@ config BOARD_INTEL_KBLRVP3 bool "Kabylake LPDDR3 RVP3" + config BOARD_INTEL_KBLRVP7 bool "Kabylake DDR3L RVP7" + config BOARD_INTEL_KBLRVP8 bool "Kabylake DDR4 RVP8" + config BOARD_INTEL_KBLRVP11 bool "Kabylake DDR4 RVP11" |