diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-17 20:51:08 +0300 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-26 21:08:41 +0000 |
commit | cd7a70f4879ff6e0f3e334ddf1031ccf0c0d31cf (patch) | |
tree | b0438431df0943ab5f0fa9d80a99fc265130ac23 /src/mainboard/intel | |
parent | 16248e89ecf73a76e5d9e9e2de46146f7ffece88 (diff) |
soc/intel: Use common romstage code
This provides stack guards with checking and common
entry into postcar.
The code in cpu/intel/car/romstage.c is candidate
for becoming architectural so function prototype
is moved to <arch/romstage.h>.
Change-Id: I4c5a9789e7cf3f7f49a4a33e21dac894320a9639
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34893
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r-- | src/mainboard/intel/baskingridge/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/intel/d945gclf/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/intel/dg41wv/romstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/intel/dg43gt/romstage.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c index 3fd9aab9c7..1a10931431 100644 --- a/src/mainboard/intel/baskingridge/romstage.c +++ b/src/mainboard/intel/baskingridge/romstage.c @@ -16,7 +16,7 @@ #include <stdint.h> #include <stddef.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <cpu/intel/haswell/haswell.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index 15acffb052..bad2b6d538 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -19,7 +19,7 @@ #include <cpu/x86/lapic.h> #include <superio/smsc/lpc47m15x/lpc47m15x.h> #include <console/console.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <northbridge/intel/i945/i945.h> #include <northbridge/intel/i945/raminit.h> #include <southbridge/intel/i82801gx/i82801gx.h> diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c index ec3e2bfbe6..74f86221eb 100644 --- a/src/mainboard/intel/dg41wv/romstage.c +++ b/src/mainboard/intel/dg41wv/romstage.c @@ -18,7 +18,7 @@ #include <device/pnp_ops.h> #include <device/pci_ops.h> #include <console/console.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <northbridge/intel/x4x/iomap.h> #include <northbridge/intel/x4x/x4x.h> #include <southbridge/intel/common/gpio.h> diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c index db896824cd..8207638a5b 100644 --- a/src/mainboard/intel/dg43gt/romstage.c +++ b/src/mainboard/intel/dg43gt/romstage.c @@ -20,7 +20,7 @@ #include <southbridge/intel/common/gpio.h> #include <southbridge/intel/common/pmclib.h> #include <northbridge/intel/x4x/x4x.h> -#include <cpu/intel/romstage.h> +#include <arch/romstage.h> #include <superio/winbond/w83627dhg/w83627dhg.h> #include <superio/winbond/common/winbond.h> #include <northbridge/intel/x4x/iomap.h> |